Intel 830 manual FSB Signal Groups, Signals Associated Strobe

Page 27

Electrical Specifications

Table 2-7. FSB Signal Groups

Signal Group

Type

Signals1

GTL+ Common Clock

Synchronous to BCLK[1:0]

BPRI#, DEFER#, RESET#, RS[2:0]#, RSP#, TRDY#,

Input

 

 

 

 

 

 

 

AP[1:0]#, ADS#, BINIT#, BNR#, BPM[5:0]#, BR0#,

GTL+ Common Clock I/O

Synchronous to BCLK[1:0]

DBSY#, DP[3:0]#, DRDY#, HIT#, HITM#, LOCK#,

 

 

MCERR#

 

 

Signals

Associated Strobe

 

 

REQ[4:0]#, A[16:3]#

ADSTB0#

GTL+ Source

Synchronous to assoc.

A[35:17]#

ADSTB1#

Synchronous I/O

strobe2

D[15:0]#, DBI0#

DSTBP0#, DSTBN0#

 

 

D[31:16]#, DBI1#

DSTBP1#, DSTBN1#

 

 

D[47:32]#, DBI2#

DSTBP2#, DSTBN2#

 

 

D[63:48]#, DBI3#

DSTBP3#, DSTBN3#

 

 

 

GTL+ Strobes

Synchronous to BCLK[1:0]

ADSTB[1:0]#, DSTBP[3:0]#, DSTBN[3:0]#

 

 

 

GTL+ Asynchronous

 

A20M#, FORCEPR#, IGNNE#, INIT#, LINT0/INTR,

Input

 

LINT1/NMI, SMI#, STPCLK#

 

 

 

 

GTL+ Asynchronous

 

FERR#/PBE#, IERR#, THERMTRIP#

Output

 

 

 

 

 

 

 

 

GTL+ Asynchronous

 

PROCHOT#

 

Input/Output

 

 

 

 

 

 

 

 

 

TAP Input

Synchronous to TCK

TCK, TDI, TMS, TRST#

 

 

 

 

 

TAP Output

Synchronous to TCK

TDO

 

 

 

 

 

FSB Clock

Clock

BCLK[1:0], ITP_CLK[1:0]3

 

 

 

VCC, VTT, VCCA, VCCIOPLL, VID[5:0], VSS, VSSA,

 

 

GTLREF[1:0], COMP[1:0], COMP[3:2], IMPSEL,

 

 

RESERVED, TESTHI[13:0], THERMDA, THERMDC,

Power/Other

 

VCC_SENSE, VSS_SENSE, BSEL[2:0], SKTOCC#,

 

DBR#3, VTTPWRGD, BOOTSELECT, PWRGOOD,

 

 

VTT_OUT_LEFT, VTT_OUT_RIGHT, VTT_SEL,

 

 

LL_ID[1:0], FCx, VCC_MB_REGULATION,

 

 

VSS_MB_REGULATION, MSID[1:0], VCCPLL

 

 

 

 

NOTES:

 

 

 

1.Refer to Section 4.2 for signal descriptions.

2.The value of A[16:3]# and A[35:17]# during the active-to-inactive edge of RESET# defines the processor configuration options. See Section 6.1 for details.

3.In processor systems where there is no debug port implemented on the system board, these signals are used to support a debug port interposer. In systems with the debug port implemented on the system board, these signals are no connects.

Table 2-8outlines the signals which include on-die termination (RTT). Open drain signals are also included. Table 2-9provides signal reference voltages.

Datasheet

27

Page 26 Page 28
Image 27
Page 26 Page 28
Contents Intel Pentium D Processor 800Δ Sequence DatasheetContents Contents Halt and Enhanced Halt Powerdown States Figures Tables Revision History Revision Description DateInitial release May Contents Intel Pentium D Processor 800 Sequence Features Contents Introduction Processor Packaging Terminology TerminologyReferences ReferencesIntroduction VCC Decoupling Electrical SpecificationsPower and Ground Lands Decoupling GuidelinesFSB Decoupling Voltage IdentificationVID5 VID4 VID3 VID2 VID1 VID0 Voltage Identification DefinitionReserved, Unused, FC and Testhi Signals Absolute Maximum and Minimum Ratings Voltage and Current SpecificationsDC Voltage and Current Specifications Symbol Parameter Min Max UnitVttout ICC Voltage and Current SpecificationsSymbol Parameter Min Typ Max Unit VID072 Icc a Voltage Deviation from VID Setting V 1, 2000 065Icc a 020 040 000 019007 026 013 033Icc a Time duration of V CC overshoot above VID VCC Overshoot SpecificationVCC Overshoot Specifications Magnitude of V CC overshoot above VID 050Signaling Specifications FSB Signal GroupsDie Voltage Validation Signals Associated Strobe FSB Signal GroupsSignal Group Signals2 GTL+ Asynchronous Signals Signal CharacteristicsSignal Reference Voltages Symbol Parameter Max Unit FSB DC Specifications10. BSEL20 and VID50 Signal Group DC Specifications 11. GTL+ Signal Group DC Specifications13. GTL+ Asynchronous Signal Group DC Specifications 12. Pwrgood Input and TAP Signal Group DC Specifications16. GTL+ Bus Voltage Definitions 14. Vttpwrgd DC Specifications15. Bootselect and MSID10 DC Specifications Symbol Parameter Min Typ Max UnitsFSB Clock BCLK10 and Processor Clocking Clock SpecificationsFSB Frequency Select Signals 17. Core Frequency to FSB Multiplier Configuration133 MHz Phase Lock Loop PLL and Filter18. BSEL20 Frequency Table for BCLK10 FSB FrequencyPhase Lock Loop PLL Filter Requirements Package Mechanical Drawing Package Mechanical SpecificationsProcessor Package Drawing Package Mechanical Specifications Package Mechanical Specifications Package Handling Guidelines Package Loading SpecificationsProcessor Loading Specifications Processor Component Keep-Out ZonesProcessor Markings Package Insertion SpecificationsProcessor Mass Specification Processor MaterialsProcessor Top-Side Marking Example Intel Pentium D Processor Processor Land Coordinates, Top View Processor Land CoordinatesProcessor Land Assignments Land Listing and Signal DescriptionsLandout Diagram Top View Left Side Landout Diagram Top View Right Side Alphabetical Land Assignments Land Name Signal Buffer Direction TypeDBI0# GTLREF1 VCC AC8 VCC AK8 Vccmb AN5 VSS AA3 VSS AJ4 E11 Power/Other Vssmb AN6 Numerical Land Assignment Land Land Name Signal Buffer Direction TypeReserved ADS# Reserved DEFER# J12 N30 AA1 Vttoutright AD4 VSS AH1 VSS AK2 VSS AN1 VSS Name Type Description Alphabetical Signals ReferenceSignal Description Sheet 1 Request SignalsName Signal Description Sheet 2Signal Description Sheet 3 Bus Signal Data Bus SignalsData Group Signal Description Sheet 4 Signal Description Sheet 5 Signal Description Sheet 6 RESET#Pwrgood Signal Description Sheet 7 Signal Description Sheet 8 Land Listing and Signal Descriptions Thermal Specifications and Design Considerations Processor Thermal SpecificationsThermal Specifications Processor Thermal Specifications Minimum Maximum T C CGHz Thermal Profile for the Pentium D Processor with PRB=1 Power Maximum T CThermal Profile for the Pentium D Processor with PRB=0 PowerProcessor Thermal Features Thermal MetrologyThermal Monitor PROCHOT# Signal On-Demand ModeFORCEPR# Signal Pin Thermal Diode Parameters THERMTRIP# SignalTcontrol and Fan Speed Reduction Thermal DiodeSignal Name Land Number Signal Description Thermal Diode InterfaceDiode anode Thermal Specifications and Design Considerations Power-On Configuration Option Signals FeaturesPower-On Configuration Options Clock Control and Low Power StatesNormal State Halt and Enhanced Halt Powerdown StatesStop-Grant State Enhanced Halt Powerdown StateEnhanced Intel SpeedStep Technology Enhanced Halt Snoop or Halt Snoop State, Grant Snoop StateMechanical Representation of the Boxed Processor Boxed Processor SpecificationsBoxed Processor Cooling Solution Dimensions Mechanical SpecificationsBoxed Processor Fan Heatsink Weight Fan Heatsink Power SupplyElectrical Requirements Sense frequency Fan Heatsink Power and Signal Specifications+12 V 12 volt fan power supply Description Min Typ Max UnitBoxed Processor Cooling Requirements Thermal SpecificationsBoxed Processor Specifications Variable Speed Fan Boxed Processor Fan Boxed Processor Fan SpeedFan operates at its highest speed Boxed Processor Specifications Mechanical Representation of the Boxed Processor Cooling Solution Dimensions Boxed Processor Support and Retention Module SRM Assembly Stack Including the Support and Retention ModuleControl Sense Sense frequencyDatasheet 101 Boxed Processor Boxed Processor Fan Speed Boxed Processor TMA Set PointsDatasheet 103 104 Electrical Considerations Debug Tools SpecificationsLogic Analyzer Interface LAI Mechanical Considerations106

830 specifications

The Intel 830 chipset, introduced in the early 2000s, marked a significant evolution in Intel's chipset architecture for desktop and mobile computing. Known for its support of the Pentium 4 processors, the 830 chipset was tailored for both performance and stability, making it an appealing choice for OEMs and enthusiasts alike.

One of the standout features of the Intel 830 chipset is its support for DDR SDRAM, providing a much-needed boost in memory bandwidth compared to its predecessors. With dual-channel memory support, the chipset could utilize two memory modules simultaneously, which effectively doubled the data transfer rate and enhanced overall system performance. This made the Intel 830 particularly beneficial for applications requiring high memory throughput, such as multimedia processing and gaming.

Another important characteristic of the Intel 830 was its integrated graphics support, featuring Intel's Extreme Graphics technology. This integration allowed for decent graphics performance without the need for a dedicated GPU, making it suitable for budget systems and everyday computing tasks. However, for power users and gaming enthusiasts, the option to incorporate a discrete graphics card remained available through the provided PCI Express x16 slot.

The Intel 830 chipset also boasted advanced I/O capabilities, including support for USB 2.0, which provided faster data transfer rates compared to USB 1.1, and enhanced IDE interfaces for connecting hard drives and optical devices. With its Hyper-Threading technology support, the chipset allowed for improved multitasking efficiency, enabling a single processor to execute multiple threads simultaneously, a feature that was particularly beneficial in server environments and complex computing tasks.

In terms of connectivity, the Intel 830 supported multiple bus interfaces, including PCI Express and AGP, thereby enabling users to expand their systems with various add-on cards. This flexibility contributed to the chipset's longevity in the marketplace, as it catered to a wide range of user needs from light computing to intensive gaming and content creation.

In summary, the Intel 830 chipset combined enhanced memory capabilities, integrated graphics performance, robust I/O features, and flexible expansion options, making it a versatile choice for various computing environments during its time. It played a key role in shaping the landscape of early 2000s computing, paving the way for future advancements in chipset technology. Its legacy continues to influence modern computing architectures, illustrating the lasting impact of Intel’s innovative design principles.
Top Page Image Contents