Intel 830 manual AA1 Vttoutright

Page 61

Land Listing and Signal Descriptions

Table 4-2. Numerical Land Assignment

Land

Land Name

Signal Buffer

Direction

#

Type

 

 

 

 

 

 

W2

TESTHI12

Power/Other

Input

 

 

 

 

W3

TESTHI1

Power/Other

Input

 

 

 

 

W4

VSS

Power/Other

 

 

 

 

 

W5

A16#

Source Synch

Input/Output

 

 

 

 

W6

A18#

Source Synch

Input/Output

 

 

 

 

W7

VSS

Power/Other

 

 

 

 

 

W8

VCC

Power/Other

 

 

 

 

 

W23

VCC

Power/Other

 

 

 

 

 

W24

VCC

Power/Other

 

 

 

 

 

W25

VCC

Power/Other

 

 

 

 

 

W26

VCC

Power/Other

 

 

 

 

 

W27

VCC

Power/Other

 

 

 

 

 

W28

VCC

Power/Other

 

 

 

 

 

W29

VCC

Power/Other

 

 

 

 

 

W30

VCC

Power/Other

 

 

 

 

 

Y1

BOOTSELECT

Power/Other

Input

 

 

 

 

Y2

VSS

Power/Other

 

 

 

 

 

Y3

FC17

Power/Other

Input

 

 

 

 

Y4

A20#

Source Synch

Input/Output

 

 

 

 

Y5

VSS

Power/Other

 

 

 

 

 

Y6

A19#

Source Synch

Input/Output

 

 

 

 

Y7

VSS

Power/Other

 

 

 

 

 

Y8

VCC

Power/Other

 

 

 

 

 

Y23

VCC

Power/Other

 

 

 

 

 

Y24

VCC

Power/Other

 

 

 

 

 

Y25

VCC

Power/Other

 

 

 

 

 

Y26

VCC

Power/Other

 

 

 

 

 

Y27

VCC

Power/Other

 

 

 

 

 

Y28

VCC

Power/Other

 

 

 

 

 

Y29

VCC

Power/Other

 

 

 

 

 

Y30

VCC

Power/Other

 

 

 

 

 

AA1

VTT_OUT_RIGHT

Power/Other

Output

 

 

 

 

AA2

LL_ID1

Power/Other

Output

 

 

 

 

AA3

VSS

Power/Other

 

 

 

 

 

AA4

A21#

Source Synch

Input/Output

 

 

 

 

AA5

A23#

Source Synch

Input/Output

 

 

 

 

AA6

VSS

Power/Other

 

 

 

 

 

AA7

VSS

Power/Other

 

 

 

 

 

AA8

VCC

Power/Other

 

 

 

 

 

AA23

VSS

Power/Other

 

 

 

 

 

AA24

VSS

Power/Other

 

 

 

 

 

Table 4-2. Numerical Land Assignment

Land

Land Name

Signal Buffer

Direction

#

Type

 

 

 

 

 

 

AA25

VSS

Power/Other

 

 

 

 

 

AA26

VSS

Power/Other

 

 

 

 

 

AA27

VSS

Power/Other

 

 

 

 

 

AA28

VSS

Power/Other

 

 

 

 

 

AA29

VSS

Power/Other

 

 

 

 

 

AA30

VSS

Power/Other

 

 

 

 

 

AB1

VSS

Power/Other

 

 

 

 

 

AB2

IERR#

Asynch GTL+

Output

 

 

 

 

AB3

MCERR#

Common Clock

Input/Output

 

 

 

 

AB4

A26#

Source Synch

Input/Output

 

 

 

 

AB5

A24#

Source Synch

Input/Output

 

 

 

 

AB6

A17#

Source Synch

Input/Output

 

 

 

 

AB7

VSS

Power/Other

 

 

 

 

 

AB8

VCC

Power/Other

 

 

 

 

 

AB23

VSS

Power/Other

 

 

 

 

 

AB24

VSS

Power/Other

 

 

 

 

 

AB25

VSS

Power/Other

 

 

 

 

 

AB26

VSS

Power/Other

 

 

 

 

 

AB27

VSS

Power/Other

 

 

 

 

 

AB28

VSS

Power/Other

 

 

 

 

 

AB29

VSS

Power/Other

 

 

 

 

 

AB30

VSS

Power/Other

 

 

 

 

 

AC1

TMS

TAP

Input

 

 

 

 

AC2

DBR#

Power/Other

Output

 

 

 

 

AC3

VSS

Power/Other

 

 

 

 

 

AC4

RESERVED

 

 

 

 

 

 

AC5

A25#

Source Synch

Input/Output

 

 

 

 

AC6

VSS

Power/Other

 

 

 

 

 

AC7

VSS

Power/Other

 

 

 

 

 

AC8

VCC

Power/Other

 

 

 

 

 

AC23

VCC

Power/Other

 

 

 

 

 

AC24

VCC

Power/Other

 

 

 

 

 

AC25

VCC

Power/Other

 

 

 

 

 

AC26

VCC

Power/Other

 

 

 

 

 

AC27

VCC

Power/Other

 

 

 

 

 

AC28

VCC

Power/Other

 

 

 

 

 

AC29

VCC

Power/Other

 

 

 

 

 

AC30

VCC

Power/Other

 

 

 

 

 

AD1

TDI

TAP

Input

 

 

 

 

AD2

BPM2#

Common Clock

Input/Output

 

 

 

 

AD3

BINIT#

Common Clock

Input/Output

 

 

 

 

Datasheet

61

Image 61
Contents Intel Pentium D Processor 800Δ Sequence DatasheetContents Contents Halt and Enhanced Halt Powerdown States Figures Tables Revision Description Date Revision HistoryInitial release May Contents Intel Pentium D Processor 800 Sequence Features Contents Introduction Processor Packaging Terminology TerminologyReferences ReferencesIntroduction Power and Ground Lands Electrical SpecificationsDecoupling Guidelines VCC DecouplingFSB Decoupling Voltage IdentificationVID5 VID4 VID3 VID2 VID1 VID0 Voltage Identification DefinitionReserved, Unused, FC and Testhi Signals DC Voltage and Current Specifications Voltage and Current SpecificationsSymbol Parameter Min Max Unit Absolute Maximum and Minimum RatingsSymbol Parameter Min Typ Max Unit Voltage and Current SpecificationsVID Vttout ICC000 Icc a Voltage Deviation from VID Setting V 1, 2065 072Icc a 007 026 000 019013 033 020 040Icc a VCC Overshoot Specifications VCC Overshoot SpecificationMagnitude of V CC overshoot above VID 050 Time duration of V CC overshoot above VIDFSB Signal Groups Signaling SpecificationsDie Voltage Validation Signal Group FSB Signal GroupsSignals Signals Associated StrobeSignal Characteristics 2 GTL+ Asynchronous SignalsSignal Reference Voltages 10. BSEL20 and VID50 Signal Group DC Specifications FSB DC Specifications11. GTL+ Signal Group DC Specifications Symbol Parameter Max Unit13. GTL+ Asynchronous Signal Group DC Specifications 12. Pwrgood Input and TAP Signal Group DC Specifications15. Bootselect and MSID10 DC Specifications 14. Vttpwrgd DC SpecificationsSymbol Parameter Min Typ Max Units 16. GTL+ Bus Voltage DefinitionsFSB Frequency Select Signals Clock Specifications17. Core Frequency to FSB Multiplier Configuration FSB Clock BCLK10 and Processor Clocking18. BSEL20 Frequency Table for BCLK10 Phase Lock Loop PLL and FilterFSB Frequency 133 MHzPhase Lock Loop PLL Filter Requirements Package Mechanical Drawing Package Mechanical SpecificationsProcessor Package Drawing Package Mechanical Specifications Package Mechanical Specifications Processor Loading Specifications Package Loading SpecificationsProcessor Component Keep-Out Zones Package Handling GuidelinesProcessor Mass Specification Package Insertion SpecificationsProcessor Materials Processor MarkingsProcessor Top-Side Marking Example Intel Pentium D Processor Processor Land Coordinates, Top View Processor Land CoordinatesProcessor Land Assignments Land Listing and Signal DescriptionsLandout Diagram Top View Left Side Landout Diagram Top View Right Side Alphabetical Land Assignments Land Name Signal Buffer Direction TypeDBI0# GTLREF1 VCC AC8 VCC AK8 Vccmb AN5 VSS AA3 VSS AJ4 E11 Power/Other Vssmb AN6 Numerical Land Assignment Land Land Name Signal Buffer Direction TypeReserved ADS# Reserved DEFER# J12 N30 AA1 Vttoutright AD4 VSS AH1 VSS AK2 VSS AN1 VSS Signal Description Sheet 1 Alphabetical Signals ReferenceRequest Signals Name Type DescriptionName Signal Description Sheet 2Bus Signal Data Bus Signals Signal Description Sheet 3Data Group Signal Description Sheet 4 Signal Description Sheet 5 RESET# Signal Description Sheet 6Pwrgood Signal Description Sheet 7 Signal Description Sheet 8 Land Listing and Signal Descriptions Processor Thermal Specifications Thermal Specifications and Design ConsiderationsThermal Specifications Minimum Maximum T C C Processor Thermal SpecificationsGHz Thermal Profile for the Pentium D Processor with PRB=1 Power Maximum T CThermal Profile for the Pentium D Processor with PRB=0 PowerThermal Metrology Processor Thermal FeaturesThermal Monitor PROCHOT# Signal On-Demand ModeFORCEPR# Signal Pin Tcontrol and Fan Speed Reduction THERMTRIP# SignalThermal Diode Thermal Diode ParametersThermal Diode Interface Signal Name Land Number Signal DescriptionDiode anode Thermal Specifications and Design Considerations Power-On Configuration Options FeaturesClock Control and Low Power States Power-On Configuration Option SignalsNormal State Halt and Enhanced Halt Powerdown StatesStop-Grant State Enhanced Halt Powerdown StateEnhanced Intel SpeedStep Technology Enhanced Halt Snoop or Halt Snoop State, Grant Snoop StateMechanical Representation of the Boxed Processor Boxed Processor SpecificationsBoxed Processor Cooling Solution Dimensions Mechanical SpecificationsFan Heatsink Power Supply Boxed Processor Fan Heatsink WeightElectrical Requirements +12 V 12 volt fan power supply Fan Heatsink Power and Signal SpecificationsDescription Min Typ Max Unit Sense frequencyBoxed Processor Cooling Requirements Thermal SpecificationsBoxed Processor Specifications Boxed Processor Fan Boxed Processor Fan Speed Variable Speed FanFan operates at its highest speed Boxed Processor Specifications Mechanical Representation of the Boxed Processor Cooling Solution Dimensions Boxed Processor Support and Retention Module SRM Assembly Stack Including the Support and Retention ModuleControl Sense Sense frequencyDatasheet 101 Boxed Processor Boxed Processor Fan Speed Boxed Processor TMA Set PointsDatasheet 103 104 Logic Analyzer Interface LAI Debug Tools SpecificationsMechanical Considerations Electrical Considerations106

830 specifications

The Intel 830 chipset, introduced in the early 2000s, marked a significant evolution in Intel's chipset architecture for desktop and mobile computing. Known for its support of the Pentium 4 processors, the 830 chipset was tailored for both performance and stability, making it an appealing choice for OEMs and enthusiasts alike.

One of the standout features of the Intel 830 chipset is its support for DDR SDRAM, providing a much-needed boost in memory bandwidth compared to its predecessors. With dual-channel memory support, the chipset could utilize two memory modules simultaneously, which effectively doubled the data transfer rate and enhanced overall system performance. This made the Intel 830 particularly beneficial for applications requiring high memory throughput, such as multimedia processing and gaming.

Another important characteristic of the Intel 830 was its integrated graphics support, featuring Intel's Extreme Graphics technology. This integration allowed for decent graphics performance without the need for a dedicated GPU, making it suitable for budget systems and everyday computing tasks. However, for power users and gaming enthusiasts, the option to incorporate a discrete graphics card remained available through the provided PCI Express x16 slot.

The Intel 830 chipset also boasted advanced I/O capabilities, including support for USB 2.0, which provided faster data transfer rates compared to USB 1.1, and enhanced IDE interfaces for connecting hard drives and optical devices. With its Hyper-Threading technology support, the chipset allowed for improved multitasking efficiency, enabling a single processor to execute multiple threads simultaneously, a feature that was particularly beneficial in server environments and complex computing tasks.

In terms of connectivity, the Intel 830 supported multiple bus interfaces, including PCI Express and AGP, thereby enabling users to expand their systems with various add-on cards. This flexibility contributed to the chipset's longevity in the marketplace, as it catered to a wide range of user needs from light computing to intensive gaming and content creation.

In summary, the Intel 830 chipset combined enhanced memory capabilities, integrated graphics performance, robust I/O features, and flexible expansion options, making it a versatile choice for various computing environments during its time. It played a key role in shaping the landscape of early 2000s computing, paving the way for future advancements in chipset technology. Its legacy continues to influence modern computing architectures, illustrating the lasting impact of Intel’s innovative design principles.