Intel 830 manual 2 GTL+ Asynchronous Signals, Signal Characteristics, Signal Reference Voltages

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Electrical Specifications

Table 2-8. Signal Characteristics

Signals with RTT

Signals with no RTT

 

 

A[35:3]#, ADS#, ADSTB[1:0]#, AP[1:0]#, BINIT#,

A20M#, BCLK[1:0], BPM[5:0]#, BR0#, BSEL[2:0],

BNR#, BOOTSELECT1, BPRI#, D[63:0]#,

DBI[3:0]#, DBSY#, DEFER#, DP[3:0]#, DRDY#,

COMP[3:0], FERR#/PBE#, IERR#, IGNNE#, INIT#,

LINT0/INTR, LINT1/NMI, PWRGOOD, RESET#,

DSTBN[3:0]#, DSTBP[3:0]#, FORCEPR#, HIT#,

SKTOCC#, SMI#, STPCLK#, TDO, TESTHI[13:0],

HITM#, IMPSEL1, LOCK#, MCERR#,

PROCHOT#, REQ[4:0]#, RS[2:0]#, RSP#,

THERMDA, THERMDC, THERMTRIP#, VID[5:0],

VTTPWRGD, GTLREF[1:0], TCK, TDI, TRST#, TMS

TRDY#, MSID[1:0]1

Open Drain Signals2

 

BSEL[2:0], VID[5:0], THERMTRIP#, FERR#/

 

PBE#, IERR#, BPM[5:0]#, BR0#, TDO, VTT_SEL,

 

LL_ID[1:0]

 

 

 

NOTES:

 

1.These signals have a 250–5000 Ω pullup to VTT rather than on-die termination.

2.Signals that do not have RTT, nor are actively driven to their high-voltage level.

Table 2-9. Signal Reference Voltages

GTLREF

VTT/2

BPM[5:0]#, LINT0/INTR, LINT1/NMI, RESET#,

 

BINIT#, BNR#, HIT#, HITM#, MCERR#, PROCHOT#,

BOOTSELECT, VTTPWRGD, A20M#, IGNNE#,

BR0#, A[35:0]#, ADS#, ADSTB[1:0]#, AP[1:0]#,

INIT#, PWRGOOD1, SMI#, STPCLK#, TCK1, TDI1,

BPRI#, D[63:0]#, DBI[3:0]#, DBSY#, DEFER#,

TMS1, TRST#1, MSID[1:0]

DP[3:0]#, DRDY#, DSTBN[3:0]#, DSTBP[3:0]#,

 

LOCK#, REQ[4:0]#, RS[2:0]#, RSP#, TRDY#

 

 

 

NOTES:

1. These signals also have hysteresis added to the reference voltage. See Table 2-12for more information.

2.6.2GTL+ Asynchronous Signals

The signals A20M#, IGNNE#, INIT#, SMI#, and STPCLK# utilize CMOS input buffers. GTL+ asynchronous signals follow the same DC requirements as GTL+ signals; however, the outputs are not actively driven high (during a logical 0 to 1 transition) by the processor. GTL+ asynchronous signals do not have setup or hold time specifications in relation to BCLK[1:0].

All of the GTL+ Asynchronous signals are required to be asserted/deasserted for at least six BCLKs in order for the processor to recognize the proper signal state. See Section 2.6.3 for the DC specifications for the GTL+ Asynchronous signal groups. See Table 6.2 for additional timing requirements for entering and leaving the low power states.

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Datasheet

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Contents Datasheet Intel Pentium D Processor 800Δ SequenceContents Contents Halt and Enhanced Halt Powerdown States Figures Tables Revision Description Date Revision HistoryInitial release May Contents Intel Pentium D Processor 800 Sequence Features Contents Introduction Terminology Processor Packaging TerminologyReferences ReferencesIntroduction Electrical Specifications Power and Ground LandsDecoupling Guidelines VCC DecouplingVoltage Identification FSB DecouplingVoltage Identification Definition VID5 VID4 VID3 VID2 VID1 VID0Reserved, Unused, FC and Testhi Signals Voltage and Current Specifications DC Voltage and Current SpecificationsSymbol Parameter Min Max Unit Absolute Maximum and Minimum RatingsVoltage and Current Specifications Symbol Parameter Min Typ Max UnitVID Vttout ICCIcc a Voltage Deviation from VID Setting V 1, 2 000065 072Icc a 000 019 007 026013 033 020 040Icc a VCC Overshoot Specification VCC Overshoot SpecificationsMagnitude of V CC overshoot above VID 050 Time duration of V CC overshoot above VIDFSB Signal Groups Signaling SpecificationsDie Voltage Validation FSB Signal Groups Signal GroupSignals Signals Associated StrobeSignal Characteristics 2 GTL+ Asynchronous SignalsSignal Reference Voltages FSB DC Specifications 10. BSEL20 and VID50 Signal Group DC Specifications11. GTL+ Signal Group DC Specifications Symbol Parameter Max Unit12. Pwrgood Input and TAP Signal Group DC Specifications 13. GTL+ Asynchronous Signal Group DC Specifications14. Vttpwrgd DC Specifications 15. Bootselect and MSID10 DC SpecificationsSymbol Parameter Min Typ Max Units 16. GTL+ Bus Voltage DefinitionsClock Specifications FSB Frequency Select Signals17. Core Frequency to FSB Multiplier Configuration FSB Clock BCLK10 and Processor ClockingPhase Lock Loop PLL and Filter 18. BSEL20 Frequency Table for BCLK10FSB Frequency 133 MHzPhase Lock Loop PLL Filter Requirements Package Mechanical Specifications Package Mechanical DrawingProcessor Package Drawing Package Mechanical Specifications Package Mechanical Specifications Package Loading Specifications Processor Loading SpecificationsProcessor Component Keep-Out Zones Package Handling GuidelinesPackage Insertion Specifications Processor Mass SpecificationProcessor Materials Processor MarkingsProcessor Top-Side Marking Example Intel Pentium D Processor Processor Land Coordinates Processor Land Coordinates, Top ViewLand Listing and Signal Descriptions Processor Land AssignmentsLandout Diagram Top View Left Side Landout Diagram Top View Right Side Land Name Signal Buffer Direction Type Alphabetical Land AssignmentsDBI0# GTLREF1 VCC AC8 VCC AK8 Vccmb AN5 VSS AA3 VSS AJ4 E11 Power/Other Vssmb AN6 Land Land Name Signal Buffer Direction Type Numerical Land AssignmentReserved ADS# Reserved DEFER# J12 N30 AA1 Vttoutright AD4 VSS AH1 VSS AK2 VSS AN1 VSS Alphabetical Signals Reference Signal Description Sheet 1Request Signals Name Type DescriptionSignal Description Sheet 2 NameBus Signal Data Bus Signals Signal Description Sheet 3Data Group Signal Description Sheet 4 Signal Description Sheet 5 RESET# Signal Description Sheet 6Pwrgood Signal Description Sheet 7 Signal Description Sheet 8 Land Listing and Signal Descriptions Processor Thermal Specifications Thermal Specifications and Design ConsiderationsThermal Specifications Minimum Maximum T C C Processor Thermal SpecificationsGHz Power Maximum T C Thermal Profile for the Pentium D Processor with PRB=1Power Thermal Profile for the Pentium D Processor with PRB=0Thermal Metrology Processor Thermal FeaturesThermal Monitor On-Demand Mode PROCHOT# SignalFORCEPR# Signal Pin THERMTRIP# Signal Tcontrol and Fan Speed ReductionThermal Diode Thermal Diode ParametersThermal Diode Interface Signal Name Land Number Signal DescriptionDiode anode Thermal Specifications and Design Considerations Features Power-On Configuration OptionsClock Control and Low Power States Power-On Configuration Option SignalsHalt and Enhanced Halt Powerdown States Normal StateEnhanced Halt Powerdown State Stop-Grant StateEnhanced Halt Snoop or Halt Snoop State, Grant Snoop State Enhanced Intel SpeedStep TechnologyBoxed Processor Specifications Mechanical Representation of the Boxed ProcessorMechanical Specifications Boxed Processor Cooling Solution DimensionsFan Heatsink Power Supply Boxed Processor Fan Heatsink WeightElectrical Requirements Fan Heatsink Power and Signal Specifications +12 V 12 volt fan power supplyDescription Min Typ Max Unit Sense frequencyThermal Specifications Boxed Processor Cooling RequirementsBoxed Processor Specifications Boxed Processor Fan Boxed Processor Fan Speed Variable Speed FanFan operates at its highest speed Boxed Processor Specifications Mechanical Representation of the Boxed Processor Cooling Solution Dimensions Assembly Stack Including the Support and Retention Module Boxed Processor Support and Retention Module SRMSense Sense frequency ControlDatasheet 101 Boxed Processor TMA Set Points Boxed Processor Boxed Processor Fan SpeedDatasheet 103 104 Debug Tools Specifications Logic Analyzer Interface LAIMechanical Considerations Electrical Considerations106

830 specifications

The Intel 830 chipset, introduced in the early 2000s, marked a significant evolution in Intel's chipset architecture for desktop and mobile computing. Known for its support of the Pentium 4 processors, the 830 chipset was tailored for both performance and stability, making it an appealing choice for OEMs and enthusiasts alike.

One of the standout features of the Intel 830 chipset is its support for DDR SDRAM, providing a much-needed boost in memory bandwidth compared to its predecessors. With dual-channel memory support, the chipset could utilize two memory modules simultaneously, which effectively doubled the data transfer rate and enhanced overall system performance. This made the Intel 830 particularly beneficial for applications requiring high memory throughput, such as multimedia processing and gaming.

Another important characteristic of the Intel 830 was its integrated graphics support, featuring Intel's Extreme Graphics technology. This integration allowed for decent graphics performance without the need for a dedicated GPU, making it suitable for budget systems and everyday computing tasks. However, for power users and gaming enthusiasts, the option to incorporate a discrete graphics card remained available through the provided PCI Express x16 slot.

The Intel 830 chipset also boasted advanced I/O capabilities, including support for USB 2.0, which provided faster data transfer rates compared to USB 1.1, and enhanced IDE interfaces for connecting hard drives and optical devices. With its Hyper-Threading technology support, the chipset allowed for improved multitasking efficiency, enabling a single processor to execute multiple threads simultaneously, a feature that was particularly beneficial in server environments and complex computing tasks.

In terms of connectivity, the Intel 830 supported multiple bus interfaces, including PCI Express and AGP, thereby enabling users to expand their systems with various add-on cards. This flexibility contributed to the chipset's longevity in the marketplace, as it catered to a wide range of user needs from light computing to intensive gaming and content creation.

In summary, the Intel 830 chipset combined enhanced memory capabilities, integrated graphics performance, robust I/O features, and flexible expansion options, making it a versatile choice for various computing environments during its time. It played a key role in shaping the landscape of early 2000s computing, paving the way for future advancements in chipset technology. Its legacy continues to influence modern computing architectures, illustrating the lasting impact of Intel’s innovative design principles.
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