Intel 830 manual Reserved, Unused, FC and Testhi Signals

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Electrical Specifications

2.4Reserved, Unused, FC and TESTHI Signals

All RESERVED lands must remain unconnected. Connection of these lands to VCC, VSS, VTT, or to any other signal (including each other) can result in component malfunction or incompatibility with future processors. See Chapter 4 for a land listing of the processor and the location of all RESERVED lands.

For reliable operation, always connect unused inputs or bidirectional signals to an appropriate signal level. In a system level design, on-die termination has been included on the Pentium D processor to allow signals to be terminated within the processor silicon. Most unused GTL+ inputs should be left as no connects, as GTL+ termination is provided on the processor silicon. However, see Table 2-8for details on GTL+ signals that do not include on-die termination. Unused active high inputs should be connected through a resistor to ground (VSS). Unused outputs can be left unconnected; however, this may interfere with some test access port (TAP) functions, complicate debug probing, and prevent boundary scan testing. A resistor must be used when tying bidirectional signals to power or ground. When tying any signal to power or ground, a resistor will also allow for system testability. For unused GTL+ inputs or I/O signals, use pull-up resistors of the same value as the on-die termination resistors (RTT). Refer to Table 2-16for more details.

TAP, GTL+ Asynchronous inputs, and GTL+ Asynchronous outputs do not include on-die termination. Inputs and used outputs must be terminated on the system board. Unused outputs may be terminated on the system board or left unconnected. Note that leaving unused outputs unterminated may interfere with some TAP functions, complicate debug probing, and prevent boundary scan testing.

FCx signals are signals that are available for compatibility with other processors.

The TESTHI signals must be tied to the processor VTT using a matched resistor, where a matched resistor has a resistance value within ±20% of the impedance of the board transmission line traces. For example, if the trace impedance is 60 Ω, then a value between 48 Ω and 72 Ω is required.

The TESTHI signals may use individual pull-up resistors or be grouped together as detailed below. A matched resistor must be used for each group:

TESTHI[1:0]

TESTHI[7:2]

TESTHI8 – cannot be grouped with other TESTHI signals

TESTHI9 – cannot be grouped with other TESTHI signals

TESTHI10 – cannot be grouped with other TESTHI signals

TESTHI11 – cannot be grouped with other TESTHI signals

TESTHI12 – cannot be grouped with other TESTHI signals

TESTHI13 – cannot be grouped with other TESTHI signals

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Datasheet

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Contents Datasheet Intel Pentium D Processor 800Δ SequenceContents Contents Halt and Enhanced Halt Powerdown States Figures Tables Revision History Revision Description DateInitial release May Contents Intel Pentium D Processor 800 Sequence Features Contents Introduction Terminology Processor Packaging TerminologyReferences ReferencesIntroduction Decoupling Guidelines Electrical SpecificationsPower and Ground Lands VCC DecouplingVoltage Identification FSB DecouplingVoltage Identification Definition VID5 VID4 VID3 VID2 VID1 VID0Reserved, Unused, FC and Testhi Signals Symbol Parameter Min Max Unit Voltage and Current SpecificationsDC Voltage and Current Specifications Absolute Maximum and Minimum RatingsVID Voltage and Current SpecificationsSymbol Parameter Min Typ Max Unit Vttout ICC065 Icc a Voltage Deviation from VID Setting V 1, 2000 072Icc a 013 033 000 019007 026 020 040Icc a Magnitude of V CC overshoot above VID 050 VCC Overshoot SpecificationVCC Overshoot Specifications Time duration of V CC overshoot above VIDSignaling Specifications FSB Signal GroupsDie Voltage Validation Signals FSB Signal GroupsSignal Group Signals Associated Strobe2 GTL+ Asynchronous Signals Signal CharacteristicsSignal Reference Voltages 11. GTL+ Signal Group DC Specifications FSB DC Specifications10. BSEL20 and VID50 Signal Group DC Specifications Symbol Parameter Max Unit12. Pwrgood Input and TAP Signal Group DC Specifications 13. GTL+ Asynchronous Signal Group DC SpecificationsSymbol Parameter Min Typ Max Units 14. Vttpwrgd DC Specifications15. Bootselect and MSID10 DC Specifications 16. GTL+ Bus Voltage Definitions17. Core Frequency to FSB Multiplier Configuration Clock SpecificationsFSB Frequency Select Signals FSB Clock BCLK10 and Processor ClockingFSB Frequency Phase Lock Loop PLL and Filter18. BSEL20 Frequency Table for BCLK10 133 MHzPhase Lock Loop PLL Filter Requirements Package Mechanical Specifications Package Mechanical DrawingProcessor Package Drawing Package Mechanical Specifications Package Mechanical Specifications Processor Component Keep-Out Zones Package Loading SpecificationsProcessor Loading Specifications Package Handling GuidelinesProcessor Materials Package Insertion SpecificationsProcessor Mass Specification Processor MarkingsProcessor Top-Side Marking Example Intel Pentium D Processor Processor Land Coordinates Processor Land Coordinates, Top ViewLand Listing and Signal Descriptions Processor Land AssignmentsLandout Diagram Top View Left Side Landout Diagram Top View Right Side Land Name Signal Buffer Direction Type Alphabetical Land AssignmentsDBI0# GTLREF1 VCC AC8 VCC AK8 Vccmb AN5 VSS AA3 VSS AJ4 E11 Power/Other Vssmb AN6 Land Land Name Signal Buffer Direction Type Numerical Land AssignmentReserved ADS# Reserved DEFER# J12 N30 AA1 Vttoutright AD4 VSS AH1 VSS AK2 VSS AN1 VSS Request Signals Alphabetical Signals ReferenceSignal Description Sheet 1 Name Type DescriptionSignal Description Sheet 2 NameSignal Description Sheet 3 Bus Signal Data Bus SignalsData Group Signal Description Sheet 4 Signal Description Sheet 5 Signal Description Sheet 6 RESET#Pwrgood Signal Description Sheet 7 Signal Description Sheet 8 Land Listing and Signal Descriptions Thermal Specifications and Design Considerations Processor Thermal SpecificationsThermal Specifications Processor Thermal Specifications Minimum Maximum T C CGHz Power Maximum T C Thermal Profile for the Pentium D Processor with PRB=1Power Thermal Profile for the Pentium D Processor with PRB=0Processor Thermal Features Thermal MetrologyThermal Monitor On-Demand Mode PROCHOT# SignalFORCEPR# Signal Pin Thermal Diode THERMTRIP# SignalTcontrol and Fan Speed Reduction Thermal Diode ParametersSignal Name Land Number Signal Description Thermal Diode InterfaceDiode anode Thermal Specifications and Design Considerations Clock Control and Low Power States FeaturesPower-On Configuration Options Power-On Configuration Option SignalsHalt and Enhanced Halt Powerdown States Normal StateEnhanced Halt Powerdown State Stop-Grant StateEnhanced Halt Snoop or Halt Snoop State, Grant Snoop State Enhanced Intel SpeedStep TechnologyBoxed Processor Specifications Mechanical Representation of the Boxed ProcessorMechanical Specifications Boxed Processor Cooling Solution DimensionsBoxed Processor Fan Heatsink Weight Fan Heatsink Power SupplyElectrical Requirements Description Min Typ Max Unit Fan Heatsink Power and Signal Specifications+12 V 12 volt fan power supply Sense frequencyThermal Specifications Boxed Processor Cooling RequirementsBoxed Processor Specifications Variable Speed Fan Boxed Processor Fan Boxed Processor Fan SpeedFan operates at its highest speed Boxed Processor Specifications Mechanical Representation of the Boxed Processor Cooling Solution Dimensions Assembly Stack Including the Support and Retention Module Boxed Processor Support and Retention Module SRMSense Sense frequency ControlDatasheet 101 Boxed Processor TMA Set Points Boxed Processor Boxed Processor Fan SpeedDatasheet 103 104 Mechanical Considerations Debug Tools SpecificationsLogic Analyzer Interface LAI Electrical Considerations106

830 specifications

The Intel 830 chipset, introduced in the early 2000s, marked a significant evolution in Intel's chipset architecture for desktop and mobile computing. Known for its support of the Pentium 4 processors, the 830 chipset was tailored for both performance and stability, making it an appealing choice for OEMs and enthusiasts alike.

One of the standout features of the Intel 830 chipset is its support for DDR SDRAM, providing a much-needed boost in memory bandwidth compared to its predecessors. With dual-channel memory support, the chipset could utilize two memory modules simultaneously, which effectively doubled the data transfer rate and enhanced overall system performance. This made the Intel 830 particularly beneficial for applications requiring high memory throughput, such as multimedia processing and gaming.

Another important characteristic of the Intel 830 was its integrated graphics support, featuring Intel's Extreme Graphics technology. This integration allowed for decent graphics performance without the need for a dedicated GPU, making it suitable for budget systems and everyday computing tasks. However, for power users and gaming enthusiasts, the option to incorporate a discrete graphics card remained available through the provided PCI Express x16 slot.

The Intel 830 chipset also boasted advanced I/O capabilities, including support for USB 2.0, which provided faster data transfer rates compared to USB 1.1, and enhanced IDE interfaces for connecting hard drives and optical devices. With its Hyper-Threading technology support, the chipset allowed for improved multitasking efficiency, enabling a single processor to execute multiple threads simultaneously, a feature that was particularly beneficial in server environments and complex computing tasks.

In terms of connectivity, the Intel 830 supported multiple bus interfaces, including PCI Express and AGP, thereby enabling users to expand their systems with various add-on cards. This flexibility contributed to the chipset's longevity in the marketplace, as it catered to a wide range of user needs from light computing to intensive gaming and content creation.

In summary, the Intel 830 chipset combined enhanced memory capabilities, integrated graphics performance, robust I/O features, and flexible expansion options, making it a versatile choice for various computing environments during its time. It played a key role in shaping the landscape of early 2000s computing, paving the way for future advancements in chipset technology. Its legacy continues to influence modern computing architectures, illustrating the lasting impact of Intel’s innovative design principles.