Intel 830 manual Signal Description Sheet 8

Page 73

 

 

 

Land Listing and Signal Descriptions

Table 4-3. Signal Description (Sheet 8 of 8)

 

 

 

 

 

Name

Type

Description

 

 

 

 

 

TMS

Input

TMS (Test Mode Select) is a JTAG specification support signal used by debug

 

tools.

 

 

 

 

 

 

 

 

 

 

TRDY# (Target Ready) is asserted by the target to indicate that it is ready to

 

TRDY#

Input

receive a write or implicit writeback data transfer. TRDY# must connect the

 

 

 

appropriate pins/lands of all FSB agents.

 

 

 

 

 

 

 

TRST# (Test Reset) resets the Test Access Port (TAP) logic. TRST# must be

 

TRST#

Input

driven low during power on Reset. Refer to the eXtended Debug Port: Debug

 

Port Design Guide for UP and DP Platforms for complete implementation

 

 

 

 

 

 

details.

 

 

 

 

 

VCC

Input

VCC are the power pins for the processor. The voltage supplied to these pins is

 

determined by the VID[5:0] pins.

 

 

 

 

 

 

 

 

VCCA

Input

VCCA provides isolated power for the internal processor core PLLs.

 

 

 

 

 

VCCIOPLL

Input

VCCIOPLL provides isolated power for internal processor FSB PLLs.

 

 

 

 

 

VCCPLL

Input

VCCPLL is available for compatibility with future processors.

 

 

 

 

 

 

 

VCC_SENSE is an isolated low impedance connection to processor core power

 

VCC_SENSE

Output

(VCC). It can be used to sense or measure voltage near the silicon with little

 

 

 

noise.

 

 

 

 

 

VCC_MB_

 

This land is provided as a voltage regulator feedback sense point for VCC. It is

 

Output

connected internally in the processor package to the sense point land U27 as

 

REGULATION

described in the Voltage Regulator-Down (VRD) 10.1 Design Guide for Desktop

 

 

 

 

 

Socket 775.

 

 

 

 

 

 

 

VID[5:0] (Voltage ID) signals are used to support automatic selection of power

 

 

 

supply voltages (VCC). These are open drain signals that are driven by the

 

 

 

processor and must be pulled up on the motherboard. Refer to the Voltage

 

 

 

Regulator-Down (VRD) 10.1 Design Guide for Desktop Socket 775 for more

 

VID[5:0]

Output

information.

 

The voltage supply for these signals must be valid before the VR can supply

 

 

 

VCC to the processor. Conversely, the VR output must be disabled until the

 

 

 

voltage supply for the VID signals becomes valid. The VID signals are needed

 

 

 

to support the processor voltage specification variations. See Table 2-1for

 

 

 

definitions of these signals. The VR must supply the voltage that is requested

 

 

 

by the signals, or disable itself.

 

 

 

 

 

VSS

Input

VSS are the ground lands for the processor and should be connected to the

 

system ground plane.

 

 

 

 

 

 

 

 

VSSA

Input

VSSA is the isolated ground for internal PLLs.

 

 

 

 

 

VSS_SENSE

Output

VSS_SENSE is an isolated low impedance connection to processor core VSS. It

 

 

 

can be used to sense or measure ground near the silicon with little noise.

 

VSS_MB_

 

This land is provided as a voltage regulator feedback sense point for VSS. It is

 

Output

connected internally in the processor package to the sense point land V27 as

 

REGULATION

described in the Voltage Regulator-Down (VRD) 10.1 Design Guide for Desktop

 

 

 

 

 

Socket 775.

 

 

 

 

 

VTT

 

Miscellaneous voltage supply.

 

 

 

 

 

VTT_OUT_LEFT

 

The VTT_OUT_LEFT and VTT_OUT_RIGHT signals are included to provide a

 

Output

voltage supply for some signals that require termination to VTT on the

 

VTT_OUT_RIGHT

 

 

motherboard.

 

 

 

 

 

 

 

 

VTT_SEL

Output

The VTT_SEL signal is used to select the correct VTT voltage level for the

 

 

 

processor.

 

VTTPWRGD

Input

The processor requires this input to determine that the VTT voltages are stable

 

 

 

and within specification.

 

 

 

§

Datasheet

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Contents Intel Pentium D Processor 800Δ Sequence DatasheetContents Contents Halt and Enhanced Halt Powerdown States Figures Tables Revision Description Date Revision HistoryInitial release May Contents Intel Pentium D Processor 800 Sequence Features Contents Introduction Processor Packaging Terminology TerminologyReferences ReferencesIntroduction Power and Ground Lands Electrical SpecificationsDecoupling Guidelines VCC DecouplingFSB Decoupling Voltage IdentificationVID5 VID4 VID3 VID2 VID1 VID0 Voltage Identification DefinitionReserved, Unused, FC and Testhi Signals DC Voltage and Current Specifications Voltage and Current SpecificationsSymbol Parameter Min Max Unit Absolute Maximum and Minimum RatingsSymbol Parameter Min Typ Max Unit Voltage and Current SpecificationsVID Vttout ICC000 Icc a Voltage Deviation from VID Setting V 1, 2065 072Icc a 007 026 000 019013 033 020 040Icc a VCC Overshoot Specifications VCC Overshoot SpecificationMagnitude of V CC overshoot above VID 050 Time duration of V CC overshoot above VIDFSB Signal Groups Signaling SpecificationsDie Voltage Validation Signal Group FSB Signal GroupsSignals Signals Associated StrobeSignal Characteristics 2 GTL+ Asynchronous SignalsSignal Reference Voltages 10. BSEL20 and VID50 Signal Group DC Specifications FSB DC Specifications11. GTL+ Signal Group DC Specifications Symbol Parameter Max Unit13. GTL+ Asynchronous Signal Group DC Specifications 12. Pwrgood Input and TAP Signal Group DC Specifications15. Bootselect and MSID10 DC Specifications 14. Vttpwrgd DC SpecificationsSymbol Parameter Min Typ Max Units 16. GTL+ Bus Voltage DefinitionsFSB Frequency Select Signals Clock Specifications17. Core Frequency to FSB Multiplier Configuration FSB Clock BCLK10 and Processor Clocking18. BSEL20 Frequency Table for BCLK10 Phase Lock Loop PLL and FilterFSB Frequency 133 MHzPhase Lock Loop PLL Filter Requirements Package Mechanical Drawing Package Mechanical SpecificationsProcessor Package Drawing Package Mechanical Specifications Package Mechanical Specifications Processor Loading Specifications Package Loading SpecificationsProcessor Component Keep-Out Zones Package Handling GuidelinesProcessor Mass Specification Package Insertion SpecificationsProcessor Materials Processor MarkingsProcessor Top-Side Marking Example Intel Pentium D Processor Processor Land Coordinates, Top View Processor Land CoordinatesProcessor Land Assignments Land Listing and Signal DescriptionsLandout Diagram Top View Left Side Landout Diagram Top View Right Side Alphabetical Land Assignments Land Name Signal Buffer Direction TypeDBI0# GTLREF1 VCC AC8 VCC AK8 Vccmb AN5 VSS AA3 VSS AJ4 E11 Power/Other Vssmb AN6 Numerical Land Assignment Land Land Name Signal Buffer Direction TypeReserved ADS# Reserved DEFER# J12 N30 AA1 Vttoutright AD4 VSS AH1 VSS AK2 VSS AN1 VSS Signal Description Sheet 1 Alphabetical Signals ReferenceRequest Signals Name Type DescriptionName Signal Description Sheet 2Bus Signal Data Bus Signals Signal Description Sheet 3Data Group Signal Description Sheet 4 Signal Description Sheet 5 RESET# Signal Description Sheet 6Pwrgood Signal Description Sheet 7 Signal Description Sheet 8 Land Listing and Signal Descriptions Processor Thermal Specifications Thermal Specifications and Design ConsiderationsThermal Specifications Minimum Maximum T C C Processor Thermal SpecificationsGHz Thermal Profile for the Pentium D Processor with PRB=1 Power Maximum T CThermal Profile for the Pentium D Processor with PRB=0 PowerThermal Metrology Processor Thermal FeaturesThermal Monitor PROCHOT# Signal On-Demand ModeFORCEPR# Signal Pin Tcontrol and Fan Speed Reduction THERMTRIP# SignalThermal Diode Thermal Diode ParametersThermal Diode Interface Signal Name Land Number Signal DescriptionDiode anode Thermal Specifications and Design Considerations Power-On Configuration Options FeaturesClock Control and Low Power States Power-On Configuration Option SignalsNormal State Halt and Enhanced Halt Powerdown StatesStop-Grant State Enhanced Halt Powerdown StateEnhanced Intel SpeedStep Technology Enhanced Halt Snoop or Halt Snoop State, Grant Snoop StateMechanical Representation of the Boxed Processor Boxed Processor SpecificationsBoxed Processor Cooling Solution Dimensions Mechanical SpecificationsFan Heatsink Power Supply Boxed Processor Fan Heatsink WeightElectrical Requirements +12 V 12 volt fan power supply Fan Heatsink Power and Signal SpecificationsDescription Min Typ Max Unit Sense frequencyBoxed Processor Cooling Requirements Thermal SpecificationsBoxed Processor Specifications Boxed Processor Fan Boxed Processor Fan Speed Variable Speed FanFan operates at its highest speed Boxed Processor Specifications Mechanical Representation of the Boxed Processor Cooling Solution Dimensions Boxed Processor Support and Retention Module SRM Assembly Stack Including the Support and Retention ModuleControl Sense Sense frequencyDatasheet 101 Boxed Processor Boxed Processor Fan Speed Boxed Processor TMA Set PointsDatasheet 103 104 Logic Analyzer Interface LAI Debug Tools SpecificationsMechanical Considerations Electrical Considerations106

830 specifications

The Intel 830 chipset, introduced in the early 2000s, marked a significant evolution in Intel's chipset architecture for desktop and mobile computing. Known for its support of the Pentium 4 processors, the 830 chipset was tailored for both performance and stability, making it an appealing choice for OEMs and enthusiasts alike.

One of the standout features of the Intel 830 chipset is its support for DDR SDRAM, providing a much-needed boost in memory bandwidth compared to its predecessors. With dual-channel memory support, the chipset could utilize two memory modules simultaneously, which effectively doubled the data transfer rate and enhanced overall system performance. This made the Intel 830 particularly beneficial for applications requiring high memory throughput, such as multimedia processing and gaming.

Another important characteristic of the Intel 830 was its integrated graphics support, featuring Intel's Extreme Graphics technology. This integration allowed for decent graphics performance without the need for a dedicated GPU, making it suitable for budget systems and everyday computing tasks. However, for power users and gaming enthusiasts, the option to incorporate a discrete graphics card remained available through the provided PCI Express x16 slot.

The Intel 830 chipset also boasted advanced I/O capabilities, including support for USB 2.0, which provided faster data transfer rates compared to USB 1.1, and enhanced IDE interfaces for connecting hard drives and optical devices. With its Hyper-Threading technology support, the chipset allowed for improved multitasking efficiency, enabling a single processor to execute multiple threads simultaneously, a feature that was particularly beneficial in server environments and complex computing tasks.

In terms of connectivity, the Intel 830 supported multiple bus interfaces, including PCI Express and AGP, thereby enabling users to expand their systems with various add-on cards. This flexibility contributed to the chipset's longevity in the marketplace, as it catered to a wide range of user needs from light computing to intensive gaming and content creation.

In summary, the Intel 830 chipset combined enhanced memory capabilities, integrated graphics performance, robust I/O features, and flexible expansion options, making it a versatile choice for various computing environments during its time. It played a key role in shaping the landscape of early 2000s computing, paving the way for future advancements in chipset technology. Its legacy continues to influence modern computing architectures, illustrating the lasting impact of Intel’s innovative design principles.
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