Intel 830 manual Reserved ADS#

Page 57

Land Listing and Signal Descriptions

Table 4-2. Numerical Land Assignment

Land

Land Name

Signal Buffer

Direction

#

Type

 

 

 

 

 

 

C24

VSS

Power/Other

 

 

 

 

 

C25

VTT

Power/Other

 

 

 

 

 

C26

VTT

Power/Other

 

 

 

 

 

C27

VTT

Power/Other

 

 

 

 

 

C28

VTT

Power/Other

 

 

 

 

 

C29

VTT

Power/Other

 

 

 

 

 

C30

VTT

Power/Other

 

 

 

 

 

D1

RESERVED

 

 

 

 

 

 

D2

ADS#

Common Clock

Input/Output

 

 

 

 

D3

VSS

Power/Other

 

 

 

 

 

D4

HIT#

Common Clock

Input/Output

 

 

 

 

D5

VSS

Power/Other

 

 

 

 

 

D6

VSS

Power/Other

 

 

 

 

 

D7

D20#

Source Synch

Input/Output

 

 

 

 

D8

D12#

Source Synch

Input/Output

 

 

 

 

D9

VSS

Power/Other

 

 

 

 

 

D10

D22#

Source Synch

Input/Output

 

 

 

 

D11

D15#

Source Synch

Input/Output

 

 

 

 

D12

VSS

Power/Other

 

 

 

 

 

D13

D25#

Source Synch

Input/Output

 

 

 

 

D14

RESERVED

 

 

 

 

 

 

D15

VSS

Power/Other

 

 

 

 

 

D16

RESERVED

 

 

 

 

 

 

D17

D49#

Source Synch

Input/Output

 

 

 

 

D18

VSS

Power/Other

 

 

 

 

 

D19

DBI2#

Source Synch

Input/Output

 

 

 

 

D20

D48#

Source Synch

Input/Output

 

 

 

 

D21

VSS

Power/Other

 

 

 

 

 

D22

D46#

Source Synch

Input/Output

 

 

 

 

D23

VCCPLL

Power/Other

Input

 

 

 

 

D24

VSS

Power/Other

 

 

 

 

 

D25

VTT

Power/Other

 

 

 

 

 

D26

VTT

Power/Other

 

 

 

 

 

D27

VTT

Power/Other

 

 

 

 

 

D28

VTT

Power/Other

 

 

 

 

 

D29

VTT

Power/Other

 

 

 

 

 

D30

VTT

Power/Other

 

 

 

 

 

E2

VSS

Power/Other

 

 

 

 

 

E3

TRDY#

Common Clock

Input

 

 

 

 

E4

HITM#

Common Clock

Input/Output

 

 

 

 

E5

FC20

Power/Other

Input

 

 

 

 

Table 4-2. Numerical Land Assignment

Land

Land Name

Signal Buffer

Direction

#

Type

 

 

 

 

 

 

E6

RESERVED

 

 

 

 

 

 

E7

RESERVED

 

 

 

 

 

 

E8

VSS

Power/Other

 

 

 

 

 

E9

D19#

Source Synch

Input/Output

 

 

 

 

E10

D21#

Source Synch

Input/Output

 

 

 

 

E11

VSS

Power/Other

 

 

 

 

 

E12

DSTBP1#

Source Synch

Input/Output

 

 

 

 

E13

D26#

Source Synch

Input/Output

 

 

 

 

E14

VSS

Power/Other

 

 

 

 

 

E15

D33#

Source Synch

Input/Output

 

 

 

 

E16

D34#

Source Synch

Input/Output

 

 

 

 

E17

VSS

Power/Other

 

 

 

 

 

E18

D39#

Source Synch

Input/Output

 

 

 

 

E19

D40#

Source Synch

Input/Output

 

 

 

 

E20

VSS

Power/Other

 

 

 

 

 

E21

D42#

Source Synch

Input/Output

 

 

 

 

E22

D45#

Source Synch

Input/Output

 

 

 

 

E23

RESERVED

 

 

 

 

 

 

E24

FC10

Power/Other

Input

 

 

 

 

E25

VSS

Power/Other

 

 

 

 

 

E26

VSS

Power/Other

 

 

 

 

 

E27

VSS

Power/Other

 

 

 

 

 

E28

VSS

Power/Other

 

 

 

 

 

E29

VSS

Power/Other

 

 

 

 

 

F2

FC5

Common Clock

Input

 

 

 

 

F3

BR0#

Common Clock

Input/Output

 

 

 

 

F4

VSS

Power/Other

 

 

 

 

 

F5

RS1#

Common Clock

Input

 

 

 

 

F6

IMPSEL

Power/Other

Input

 

 

 

 

F7

VSS

Power/Other

 

 

 

 

 

F8

D17#

Source Synch

Input/Output

 

 

 

 

F9

D18#

Source Synch

Input/Output

 

 

 

 

F10

VSS

Power/Other

 

 

 

 

 

F11

D23#

Source Synch

Input/Output

 

 

 

 

F12

D24#

Source Synch

Input/Output

 

 

 

 

F13

VSS

Power/Other

 

 

 

 

 

F14

D28#

Source Synch

Input/Output

 

 

 

 

F15

D30#

Source Synch

Input/Output

 

 

 

 

F16

VSS

Power/Other

 

 

 

 

 

F17

D37#

Source Synch

Input/Output

 

 

 

 

F18

D38#

Source Synch

Input/Output

 

 

 

 

Datasheet

57

Image 57
Contents Intel Pentium D Processor 800Δ Sequence DatasheetContents Contents Halt and Enhanced Halt Powerdown States Figures Tables Revision History Revision Description DateInitial release May Contents Intel Pentium D Processor 800 Sequence Features Contents Introduction Processor Packaging Terminology TerminologyReferences ReferencesIntroduction Power and Ground Lands Electrical SpecificationsDecoupling Guidelines VCC DecouplingFSB Decoupling Voltage IdentificationVID5 VID4 VID3 VID2 VID1 VID0 Voltage Identification DefinitionReserved, Unused, FC and Testhi Signals DC Voltage and Current Specifications Voltage and Current SpecificationsSymbol Parameter Min Max Unit Absolute Maximum and Minimum RatingsSymbol Parameter Min Typ Max Unit Voltage and Current SpecificationsVID Vttout ICC000 Icc a Voltage Deviation from VID Setting V 1, 2065 072Icc a 007 026 000 019013 033 020 040Icc a VCC Overshoot Specifications VCC Overshoot SpecificationMagnitude of V CC overshoot above VID 050 Time duration of V CC overshoot above VIDSignaling Specifications FSB Signal GroupsDie Voltage Validation Signal Group FSB Signal GroupsSignals Signals Associated Strobe2 GTL+ Asynchronous Signals Signal CharacteristicsSignal Reference Voltages 10. BSEL20 and VID50 Signal Group DC Specifications FSB DC Specifications11. GTL+ Signal Group DC Specifications Symbol Parameter Max Unit13. GTL+ Asynchronous Signal Group DC Specifications 12. Pwrgood Input and TAP Signal Group DC Specifications15. Bootselect and MSID10 DC Specifications 14. Vttpwrgd DC SpecificationsSymbol Parameter Min Typ Max Units 16. GTL+ Bus Voltage DefinitionsFSB Frequency Select Signals Clock Specifications17. Core Frequency to FSB Multiplier Configuration FSB Clock BCLK10 and Processor Clocking18. BSEL20 Frequency Table for BCLK10 Phase Lock Loop PLL and FilterFSB Frequency 133 MHzPhase Lock Loop PLL Filter Requirements Package Mechanical Drawing Package Mechanical SpecificationsProcessor Package Drawing Package Mechanical Specifications Package Mechanical Specifications Processor Loading Specifications Package Loading SpecificationsProcessor Component Keep-Out Zones Package Handling GuidelinesProcessor Mass Specification Package Insertion SpecificationsProcessor Materials Processor MarkingsProcessor Top-Side Marking Example Intel Pentium D Processor Processor Land Coordinates, Top View Processor Land CoordinatesProcessor Land Assignments Land Listing and Signal DescriptionsLandout Diagram Top View Left Side Landout Diagram Top View Right Side Alphabetical Land Assignments Land Name Signal Buffer Direction TypeDBI0# GTLREF1 VCC AC8 VCC AK8 Vccmb AN5 VSS AA3 VSS AJ4 E11 Power/Other Vssmb AN6 Numerical Land Assignment Land Land Name Signal Buffer Direction TypeReserved ADS# Reserved DEFER# J12 N30 AA1 Vttoutright AD4 VSS AH1 VSS AK2 VSS AN1 VSS Signal Description Sheet 1 Alphabetical Signals ReferenceRequest Signals Name Type DescriptionName Signal Description Sheet 2Signal Description Sheet 3 Bus Signal Data Bus SignalsData Group Signal Description Sheet 4 Signal Description Sheet 5 Signal Description Sheet 6 RESET#Pwrgood Signal Description Sheet 7 Signal Description Sheet 8 Land Listing and Signal Descriptions Thermal Specifications and Design Considerations Processor Thermal SpecificationsThermal Specifications Processor Thermal Specifications Minimum Maximum T C CGHz Thermal Profile for the Pentium D Processor with PRB=1 Power Maximum T CThermal Profile for the Pentium D Processor with PRB=0 PowerProcessor Thermal Features Thermal MetrologyThermal Monitor PROCHOT# Signal On-Demand ModeFORCEPR# Signal Pin Tcontrol and Fan Speed Reduction THERMTRIP# SignalThermal Diode Thermal Diode ParametersSignal Name Land Number Signal Description Thermal Diode InterfaceDiode anode Thermal Specifications and Design Considerations Power-On Configuration Options FeaturesClock Control and Low Power States Power-On Configuration Option SignalsNormal State Halt and Enhanced Halt Powerdown StatesStop-Grant State Enhanced Halt Powerdown StateEnhanced Intel SpeedStep Technology Enhanced Halt Snoop or Halt Snoop State, Grant Snoop StateMechanical Representation of the Boxed Processor Boxed Processor SpecificationsBoxed Processor Cooling Solution Dimensions Mechanical SpecificationsBoxed Processor Fan Heatsink Weight Fan Heatsink Power SupplyElectrical Requirements +12 V 12 volt fan power supply Fan Heatsink Power and Signal SpecificationsDescription Min Typ Max Unit Sense frequencyBoxed Processor Cooling Requirements Thermal SpecificationsBoxed Processor Specifications Variable Speed Fan Boxed Processor Fan Boxed Processor Fan SpeedFan operates at its highest speed Boxed Processor Specifications Mechanical Representation of the Boxed Processor Cooling Solution Dimensions Boxed Processor Support and Retention Module SRM Assembly Stack Including the Support and Retention ModuleControl Sense Sense frequencyDatasheet 101 Boxed Processor Boxed Processor Fan Speed Boxed Processor TMA Set PointsDatasheet 103 104 Logic Analyzer Interface LAI Debug Tools SpecificationsMechanical Considerations Electrical Considerations106

830 specifications

The Intel 830 chipset, introduced in the early 2000s, marked a significant evolution in Intel's chipset architecture for desktop and mobile computing. Known for its support of the Pentium 4 processors, the 830 chipset was tailored for both performance and stability, making it an appealing choice for OEMs and enthusiasts alike.

One of the standout features of the Intel 830 chipset is its support for DDR SDRAM, providing a much-needed boost in memory bandwidth compared to its predecessors. With dual-channel memory support, the chipset could utilize two memory modules simultaneously, which effectively doubled the data transfer rate and enhanced overall system performance. This made the Intel 830 particularly beneficial for applications requiring high memory throughput, such as multimedia processing and gaming.

Another important characteristic of the Intel 830 was its integrated graphics support, featuring Intel's Extreme Graphics technology. This integration allowed for decent graphics performance without the need for a dedicated GPU, making it suitable for budget systems and everyday computing tasks. However, for power users and gaming enthusiasts, the option to incorporate a discrete graphics card remained available through the provided PCI Express x16 slot.

The Intel 830 chipset also boasted advanced I/O capabilities, including support for USB 2.0, which provided faster data transfer rates compared to USB 1.1, and enhanced IDE interfaces for connecting hard drives and optical devices. With its Hyper-Threading technology support, the chipset allowed for improved multitasking efficiency, enabling a single processor to execute multiple threads simultaneously, a feature that was particularly beneficial in server environments and complex computing tasks.

In terms of connectivity, the Intel 830 supported multiple bus interfaces, including PCI Express and AGP, thereby enabling users to expand their systems with various add-on cards. This flexibility contributed to the chipset's longevity in the marketplace, as it catered to a wide range of user needs from light computing to intensive gaming and content creation.

In summary, the Intel 830 chipset combined enhanced memory capabilities, integrated graphics performance, robust I/O features, and flexible expansion options, making it a versatile choice for various computing environments during its time. It played a key role in shaping the landscape of early 2000s computing, paving the way for future advancements in chipset technology. Its legacy continues to influence modern computing architectures, illustrating the lasting impact of Intel’s innovative design principles.