CY7C67200
Register Description
The GPIO 0 Direction register controls the direction of the GPIO data pins (input/output). The GPIO 0 Direction register controls GPIO15 to GPIO0 while the GPIO 1 Direction register controls GPIO31 to GPIO19.
When any bit of this register is set to ‘1’, the corresponding GPIO data pin becomes an output. When any bit of this register is set to ‘0’, the corresponding GPIO data pin becomes an input.
Reserved
All reserved bits must be written as ‘0’.
GPIO 1 Direction Register [0xC028] [R/W]
Figure 47. GPIO 1 Direction Register
Bit # | 15 | 14 | 13 | 12 | 11 |
| 10 | 9 | 8 |
Field | GPIO31 | GPIO30 | GPIO29 |
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| Reserved |
| GPIO24 | |
Read/Write | R/W | R/W | R/W | R/W | R/W |
| R/W | R/W | R/W |
Default | 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 0 |
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Bit # | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Field | GPIO23 | GPIO22 | GPIO21 | GPIO20 | GPIO19 |
| Reserved |
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Read/Write | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Default | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
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Register Description
The GPIO 1 Direction register controls the direction of the GPIO data pins (input/output). The GPIO 0 Direction register controls GPIO15 to GPIO0 while the GPIO 1 Direction register controls GPIO31 to GPIO19.
When any bit of this register is set to ‘1’, the corresponding GPIO data pin becomes an output. When any bit of this register is set to ‘0’, the corresponding GPIO data pin becomes an input.
Reserved
All reserved bits must be written as ‘0’.
HSS Registers
There are eight registers dedicated to HSS operation. Each of these registers are covered in this section and summarized in Table 31.
Table 31.HSS Registers
Register Name | Address | R/W |
HSS Control Register | 0xC070 | R/W |
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HSS Baud Rate Register | 0xC072 | R/W |
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HSS Transmit Gap Register | 0xC074 | R/W |
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HSS Data Register | 0xC076 | R/W |
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HSS Receive Address Register | 0xC078 | R/W |
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HSS Receive Length Register | 0xC07A | R/W |
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HSS Transmit Address Register | 0xC07C | R/W |
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HSS Transmit Length Register | 0xC07E | R/W |
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Document #: | Page 43 of 78 |
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