CY7C67200
HPI (Host Port Interface) Read Cycle Timing
|
| tCYC |
tASU | tRP | tAH |
ADDR [1:0] |
|
|
tCSSU |
| tCSH |
nCS |
|
|
nWR |
| tRDH |
nRD |
|
|
Din [15:0] |
|
|
| tACC | tRDH |
Parameter | Description | Min. | Typ. | Max. | Unit |
tASU | Address Setup |
|
| ns | |
tAH | Address Hold |
|
| ns | |
tCSSU | Chip Select Setup |
|
| ns | |
tCSH | Chip Select Hold |
|
| ns | |
tACC | Data Access Time, from HPI_nRD falling |
|
| 1 | T[11] |
tRDH | Read Data Hold, relative to the earlier of HPI_nRD | 0 |
| 7 | ns |
| rising or HPI_nCS rising |
|
|
|
|
tRP | Read Pulse Width | 2 |
|
| T[11] |
tCYC | Read Cycle Time | 6 |
|
| T[11] |
Document #: | Page 70 of 78 |
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