CY7C67200
Host n Frame Register [R]
•Host 1 Frame Register 0xC096
•Host 2 Frame Register 0xC0B6
Figure 29. Host n Frame Register
Bit # | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
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| Reserved |
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| Frame... |
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Read/Write | - | - | - | - | - | R | R | R |
Default | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
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Bit # | 7 | 6 | 5 | 4 |
| 3 | 2 | 1 | 0 |
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| ...Frame |
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Read/Write | R | R | R | R |
| R | R | R | R |
Default | 0 | 0 | 0 | 0 |
| 0 | 0 | 0 | 0 |
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Register Description
The Host n Frame register maintains the next frame number to be transmitted (current frame number + 1). This value is updated after each SOF transmission. This register resets to 0x0000 after each CPU write to the Host n SOF/EOP Count register (Host 1: 0xC092, Host 2: 0xC0B2).
Frame (Bits [10:0])
The Frame field contains the next frame number to be trans- mitted.
Table 27.USB Device Only Registers
Reserved
All reserved bits must be written as ‘0’.
USB Device Only Registers
There are ten sets of USB Device Only registers. All sets consist of at least two registers, one for Device Port 1 and one for Device Port 2. In addition, each Device port has eight possible endpoints. This gives each endpoint register set eight registers for each Device Port for a total of 16 registers per set. The USB Device Only registers are covered in this section and summarized in Table 27.
Register Name | Address | R/W | |
(Device 1/Device 2) | |||
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Device n Endpoint n Control Register | 0x02n0 | R/W | |
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Device n Endpoint n Address Register | 0x02n2 | R/W | |
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Device n Endpoint n Count Register | 0x02n4 | R/W | |
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Device n Endpoint n Status Register | 0x02n6 | R/W | |
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Device n Endpoint n Count Result Register | 0x02n8 | R/W | |
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Device n Interrupt Enable Register | 0xC08C/0xC0AC | R/W | |
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Device n Address Register | 0xC08E/0xC0AE | R/W | |
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Device n Status Register | 0xC090/0xCB0 | R/W | |
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Device n Frame Number Register | 0xC092/0xC0B2 | R | |
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Device n SOF/EOP Count Register | 0xC094/0xC0B4 | W | |
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Device n Endpoint n Control Register [R/W]
•Device n Endpoint 0 Control Register [Device 1: 0x0200 Device 2: 0x0280]
•Device n Endpoint 1 Control Register [Device 1: 0x0210 Device 2: 0x0290]
•Device n Endpoint 2 Control Register [Device 1: 0x0220 Device 2: 0x02A0]
•Device n Endpoint 3 Control Register [Device 1: 0x0230 Device 2: 0x02B0]
•Device n Endpoint 4 Control Register [Device 1: 0x0240 Device 2: 0x02C0]
•Device n Endpoint 5 Control Register [Device 1: 0x0250 Device 2: 0x02D0]
•Device n Endpoint 6 Control Register [Device 1: 0x0260 Device 2: 0x02E0]
•Device n Endpoint 7 Control Register [Device 1: 0x0270 Device 2: 0x02F0]
Document #: | Page 28 of 78 |
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