CY7C67200
HPI (Host Port Interface) Write Cycle Timing
ADDR [1:0]
nCS
nWR
nRD
Dout [15:0]
tASU
tCSSU
tCYC
tWP |
| tAH |
tCSH
tDSU |
| tWDH | |
|
|
|
|
Parameter | Description | Min. | Typical | Max. | Unit |
tASU | Address Setup |
|
| ns | |
tAH | Address Hold |
|
| ns | |
tCSSU | Chip Select Setup |
|
| ns | |
tCSH | Chip Select Hold |
|
| ns | |
tDSU | Data Setup | 6 |
|
| ns |
tWDH | Write Data Hold | 2 |
|
| ns |
t | Write Pulse Width | 2 |
|
| T[11] |
WP |
|
|
|
|
|
t | Write Cycle Time | 6 |
|
| T[11] |
CYC |
|
|
|
|
|
Note
11. T = system clock period = 1/48 MHz.
Document #: | Page 69 of 78 |
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