Initial Conditions At Power On

Status Registers

When the power supply is turned on, a sequence of commands initializes the status registers. For the factory-default *RST power-on state, Table 8-4 shows the register states and corresponding power-on commands.

Table 8-4. Default Power On Register States

 

Register

Condition

Caused By

Operation PTR; Questionable PTR

All bits = 1

STAT:PRE

Operation NTR; Questionable NTR

All bits = 0

STAT:PRE

Operation Event; Questionable Event

All bits = 0

*CLS

Operation Enable; Questionable Enable

All bits = 0

STAT:PRE

Standard Event Status Enable

All bits = 01

*ESE 0

Status Byte

All bits = 0

*CLS

Status Request Enable

All bits = 01

*SRE 0

Output Queue

Cleared

*CLS

1If PSC=1. If PSC = 0, then the last previous state before turn on is recalled. The value of PSC is stored in nonvolatile memory.

The PON (Power-On) Bit

The PON bit in the Standard Event register is set whenever the power supply is turned on. The most common use for PON is to generate an SRQ at power on following an unexpected loss of power. To do this, bit 7 of the Standard Event Enable register must be set so that a power-on event registers in the ESB (Standard Event Summary Bit). Also, bit 5 of the Service Request Enable register must be set to permit an SRQ to be generated. The commands to accomplish these two conditions are:

*ESE 128 *SRE 32

If *PSC is programmed to 0, the contents of the Standard Event Enable and Service RequestEnable registers are saved in nonvolatile memory and recalled at power on. This allows a PON event to generate SRQ at power on. Programming *PSC to 1 prevents these registers from being saved and they are cleared at power on. This prevents a PON event from generating SRQ at power on.

Status Register Programming Examples

Note

These examples are generic SCPI commands. See "Chapter 6 - Remote Programming" for information

 

about encoding the commands as language strings.

 

 

Determining the Cause of a Service Interrupt

You can determine the reason for an SRQ by the following actions:

Use a serial poll or the *STB? query to determine which summary bits are active.

Read the corresponding Event register for each summary bit to determine which events caused the summary bit to be set. When an Event register is read, it is cleared. This also clears the corresponding summary bit.

The interrupt will recur until the specific condition that caused each event is removed. If this is not possible, the event may be disabled by programming the corresponding bit of the status group Enable register or NTRPTR filter. A faster way to prevent the interrupt is to disable the service request by programming the appropriate bit of the Service Request Enable register.

Status Reporting 91

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Agilent Technologies E4356A manual Initial Conditions At Power On, Status Register Programming Examples, Status Registers