Chapter 3 Signals and Pinout Tables
COM 830 Reference Manual 51
PCI Interrupt Routing Map04h (see
Note) 00h xxh Internal PCI Express Port 3
05h (see
Note) 00h Xxh Internal PCI Express Port 4
06h (see
Note) 00h 00h Internal Onboard Gigabit LAN
Controller
07h (see
Note) 04h xxh INTA-INTD PCI Bus Slot 1
07h (see
Note) 05h xxh INTA-INTD PCI Bus Slot 2
07h (see
Note) 06h xxh INTA-INTD PCI Bus Slot 3
07h (see
Note) 07h xxh INTA-INTD PCI Bus Slot 4
NOTE The given bus numbers only apply if all PCI Express Ports are enabled in the BIOS
setup. If for example PCI Express Port 2 is disabled then PCI Express Port 3 will be
assigned bus number 3 instead of bus number 4, Port 4 will be assigned bus number 4
and the standard PCI slots will be assigned bus number 6. Furthermore, the
respective PCI Express Root Port is hidden if the corresponding PCI Express Port is
disabled.
Table 3-30. PCI Interrupt Routing Map
PIRQ PCI
BUS
INT
Line ยน
APIC
Mode
IRQ
VGA Azalia
HDA
UHC
I 0 UCH
I 1 UCH
I 2 UHCI
3EH
CI PATA
Native
SM
Bus A
C
9
7
A16xx x
B17 x
C18 x x
D19 x x
EINTD20
FINTA21
GINTB22
HINTC23 x x
Table 3-29. PCI Configuration Space Map (Continued)