Table 3.6 Information Transfer Phases

 

Signal

 

Phase Name

Direction of Transfer

 

Comment

MSG

C/D

I/O

 

 

 

 

 

 

 

 

 

 

 

 

0

0

 

0

DATA OUT

Initiator to target

⎫

Data

0

0

 

1

DATA IN

Initiator from target

⎪

Phase

 

⎭

0

1

 

0

COMMAND

Initiator to target

 

 

0

1

 

1

STATUS

Initiator from target

 

 

1

0

 

0

*

 

 

 

1

0

 

1

*

 

 

 

1

1

 

0

MESSAGE OUT

Initiator to target

⎫

Message

1

1

 

1

MESSAGE IN

Initiator to target

⎪

Phase

 

⎭

Key: 0 = False, 1 = True, * = Reserved for future standardization

Asynchronous Information Transfer

The target shall control the direction of information transfer by means of the I/O signal. When the I/O signal is true, information shall be transferred from the target to the initiator. When the I/O signal is false, information shall be transferred from the initiator to the target. If the I/O signal is true (transfer to the initiator), the target shall first drive the DB(7-0,P) signals to their desired values, delay at least one deskew delay plus a cable skew delay, then assert the REQ signal. The DB(7-0,P) signals shall remain valid until the ACK signal is true at the target. The initiator shall read the DB(7- 0,P) signals after the REQ signal is true, then indicate its acceptance of the data by asserting the ACK signal. When the ACK signal becomes true at the target, the target may change or release the DB(7-0,P) signals and shall negate the REQ signal. After the REQ signal is false the initiator shall then negate the ACK signal. After the ACK signal is false the target may continue the transfer by dividing the DB(7-0,P) signals and asserting the REQ signal, as described above.

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M3099GX/GH OEM Manual