HP UX Caliper Software manual Alat Metrics Summed for Entire Run

alat Metrics Summed for Entire Run

This section describes the metrics summed over the entire run of your application under HP Caliper.

Metrics for Integrity Servers Itanium 2 Systems

INST_CHKA_LDC_ALAT.ALL	The number of advance check load (chk.a) and check load
	(ld.c) instructions that reached retirement, including both
	integer and floating-point instructions.
INST_FAILED_CHKA_LDC_ALAT.ALL	The number of failed advance check load(chk.a) and
	check load (ld.c) instructions that reached retirement,
	including both integer and floating-point instructions. These
	failures occur when the ALAT does not contain the expected
	data.
	Up to two such events can happen in a given cycle.
	However, the processor only counts a maximum of one event
	per cycle.
	Each sample taken can potentially mask one increment of
	this counter. You can minimize this perturbation by keeping
	the sampling rate low, for example, a sampling rate of one
	sample per 100 failures would perturb this count by less
	than 1 percent.
ALAT_CAPACITY_MISS.ALL	The number of times an advance load (ld.a, ld.as,
	ldfp.a or ldfp.as) or missing ld.c.nc instructions
	displaced a valid entry in the ALAT that did not have the
	same register ID or replaced the last one to two invalid
	entries.
Data speculation miss percentage	Percentage of retired chk.a /ld.c instructions that failed.

Metrics for Integrity Servers Dual-Core Itanium 2 and Itanium 9300 Quad-Core Processor Systems

ALAT_CAPACITY_MISS.FP	The number of times an advanced load (ldfp.a or
	ldfp.as) displaced a valid entry in the ALAT that did not
	have the same register ID or replaced the last one to two
	invalid entries. Counts only floating-point loads.
ALAT_CAPACITY_MISS.INT	The number of times an advanced load (ld.a, ld.as) or
	missing ld.c.nc displaced a valid entry in the ALAT that
	did not have the same register ID or replaced the last one
	to two invalid entries. Counts only integer loads.
BACK_END_BUBBLE.ALL	The number of full-pipe bubbles in the main pipe stalled due
	to any of five possible events (FPU/L1D, RSE, EXE,
	branch/exception, or the front end). Counts front-end, RSE,
	EXEC, FPU/L1D stalls or pipeline flushes due to an
	exception/branch misprediction.
CPU_OP_CYCLES.ALL	The number of variable clock cycles. (When charge rationing
	is on, the period of the cycle could change.) It does not
	count cycles when the CPU is in low power mode.
	When HyperThreading is on, this is the number of variable
	clock cycles used by only this process's hyperthread.
CPU_OP_CYCLES.ALL:all_threads=true	The number of variable clock cycles used by both
	hyperthreads. Available only when HyperThreading is on.
IA64_INST_RETIRED	The number of retired instructions excluding
	hardware-generated RSE operations. This event includes all
	retired instructions including predicated off instructions and
	nop instructions.

alat Measurement Report Description 169