WB - 64

This is total number of cacheable 64-byte write backs per 1000 retired instructions, including nops and predicated off instructions.

Instr

This is total number of uncacheable instruction (prefetch and demand) fetches per 1000 retired instructions, including nops and predicated off instructions.

Load

This is total number of uncacheable loads per 1000 retired instructions, including nops and predicated off instructions.

Store

This is total number of uncacheable stores (write backs) per 1000 retired instructions, including nops and predicated off instructions.

queues Event Set

Available only on Itanium 2 and dual-core Itanium 2 systems.

The queues event set provides bus request queue (BRQ) information that might give insight into possible performance problems related to the system bus. The BRQ is a centralized queueing structure that collects almost all requests from the L1 cache and then schedules those requests to the L2 cache or front side bus (FSB). High values on the available metrics will likely indicate levels of bus utilization. This can be confirmed with the sysbus event set.

If you use this event set, the default is to make the measurements irrespective of CPU operating state (that is, user, system, or interrupt states). By default, the idle state is not included in the measurement. You can use command-line options to limit the scope of the measurement. Specifically, you can:

Limit measurement to a specific privilege level: -m event_set[:alluserkernel]

Include idle: --exclude-idle False

Exclude the interruption state: --measure-on-interrupts off

Only measure the interruption state: --measure-on-interrupts only

Metrics Available from this Measurement

The following metrics are available from this event set. These descriptions do not take into account any command-line options you might use.

The metrics are:

CPU Cycles

This is the number of CPU cycles that were observed during the sample period. It is used with BRQ read requests issued to compute the BRQ requests insert rate. It can also be useful to determine the percentage of time it is being monitored.

BRQ Read Requests Inserted

This is a count of the number of requests that were inserted into the BRQ during the sample observation period.

BRQ Read Requests Per Sec

This is the number of BRQ requests inserted per second. It gives a view of the total demand that a processor is delivering to the system.

AVG BRQ Live Entries Per Cycle (not present in dual-core Itanium 2 and Itanium 9300 quad-core processor systems)

This is the average number live BRQ entries on a per-cycle basis. You can use it to obtain an idea of how the system is responding to load. Values less than 1.0 indicate very light load,

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HP UX Caliper Software manual Queues Event Set