￿￿￿￿￿￿￿￿￿￿￿

￿￿￿￿￿￿￿￿￿￿￿

￿￿￿￿￿￿￿￿￿￿￿

￿￿￿￿￿￿￿￿￿￿￿

￿

CPU

￿￿￿￿￿ L2 Cache￿￿￿￿￿ Memory ￿￿￿￿￿

Memory ￿

￿

 

￿￿￿￿￿

￿￿￿￿￿ Control.￿￿￿￿￿

￿

￿￿￿￿￿￿￿￿￿￿￿

￿￿￿￿￿￿￿￿￿￿￿

￿￿￿￿￿￿￿￿￿￿￿

￿￿￿￿￿￿￿￿￿￿￿

 

 

 

 

 

￿

￿

 

 

 

 

 

 

 

￿

￿

 

 

 

 

 

 

 

￿￿￿￿￿￿￿￿￿￿￿

 

 

 

 

 

 

 

￿ I/0

￿

 

 

 

 

 

 

 

￿ Control.￿

 

 

 

 

 

 

 

￿￿￿￿￿￿￿￿￿￿￿

 

 

 

 

 

 

 

￿

￿

 

 

 

 

 

 

 

￿

￿

 

 

￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿

￿

 

 

 

 

 

 

 

￿

￿

 

BUS

 

ISA/EISA/MCA/VL/PCI

 

 

￿

￿

 

 

 

 

 

 

 

￿

￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿￿

 

￿ ￿

￿ ￿

 

 

 

￿ ￿

￿ ￿

 

 

￿￿￿

￿￿￿

 

 

 

￿￿￿

￿￿￿

 

 

Slots

 

 

 

SCSI

VGA

 

 

 

 

 

 

Figure 4.

Dual Path Bus Implementation

 

 

 

Without a dual path bus, there is often contention for system resources such as main memory. When contention between the processor and a bus master occurs, one has to wait for the other to finish its memory cycle before it can proceed. Thus, fast devices like processors have to wait for much slower I/O devices, slowing down the performance of the entire system to the speed of the slowest device. This is very costly to the overall system performance.

1.3.4 SynchroStream Technology

SynchroStream is an extension of the dual bus path technique. The SynchroStream controller synchronizes the operation of fast and slow devices and streams data to these devices to ensure that all devices work at their optimum levels of performance.

It works much like a cache controller in that it pre-fetches extra data on each access to memory and buffers this data in anticipation of the next request. When the device requests the data, the IBM SynchroStream controller provides it quickly from the buffer and the device continues working. It does not have to wait for a normal memory access cycle.

When devices are writing data into memory, the IBM SynchroStream controller again buffers the data, and writes it to memory after the bus cycle is complete.

Since devices are not moving data to and from memory directly, but to the SynchroStream controller, each device has its own logical path to memory. The devices do not have to wait for other, slower devices.

8NetWare Integration Guide

Page 23
Image 23
IBM SG24-4576-00 manual SynchroStream Technology, Cpu, Scsi