IXP1200 Network Processor Family ATM
Entry | Description | |
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Next | Address of the next entry in the chain of entries that hash to the same row. 0 indicates no | |
next entry. (21 bit SRAM address) | ||
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Key | Hash key used to find this entry, also used to confirm arrival at the desired entry. Key = | |
(atm_header & 0xFFFFFFF0) port# | ||
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Buffer Offset | Indicates which | |
completion of PDU assembly, this field is copied to the buffer descriptor. | ||
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Buffer Index | Buffer descriptor (and data buffer) to be used by ATM Receive to deposit payloads on this | |
VC. | ||
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LLC/SNAP | 1: LLC0_IP, LLC1_IP | |
else: available for other patterns | ||
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| Queue To StrongARM core "Q" flag | |
Q | 1: queue all traffic to core | |
| 0: do not queue to core | |
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AAL | 5: ATM Adaptation Layer 5 | |
0: VC is not open | ||
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CRC | The | |
is moved, and then retrieved and used when the next cell in the PDU is received. | ||
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| The last four bytes of the previous cell in this PDU. Used during | |
Cell Data11 | allow | |
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Figure 24. VC Lookup Table Entry (VC_TABLE_LINEAR)
0
1
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3 | 3 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
1 | 0 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |||||||||||
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| Buffer Index |
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| Cell data11 |
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Entry | Description | |
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Buffer Offset | Indicates which | |
completion of PDU assembly, this field is copied to the buffer descriptor. | ||
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Buffer Index | Buffer descriptor (and data buffer) to be used by ATM Receive to deposit payloads on this VC. | |
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LLC/SNAP | 1: LLC0_IP, LLC1_IP | |
else: available for other patterns | ||
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| Queue To StrongARM core "Q" flag | |
Q | 1: queue all traffic to core | |
| 0: do not queue to core | |
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Application Note | 33 |
Modified on: 3/20/02,
