IXP1200 Network Processor Family ATM OC-3/12/Ethernet IP Router Example Design
Application Note 15
Modified on: 3/20/02,
2.3 Software Partitioning
The following figures show how the microcode functional blocks are partitioned on IXP12xx
hardware for the three system configurations.
All three figures show the ATM ports on the left, and the Ethernet ports on the right. All ports are
bi-directional, but are shown as uni-directional for clarity. The IX bus is configured in dual 32 bit
unidirectional mode.
The ATM Receive microengine uses the SRAM VC Lookup Table to assemble ATM cells into
AAL5 PDUs in DRAM. It forwards the descriptor to the fully-assembled PDUs to the IP Route
microengine via a single message queue (MSGQ) in scratchpad RAM.
The IP Route microengine reads the IP header from DRAM, performs additional checks per
RFC1812, performs an IP lookup to make a routing decision, then enqueues the Ethernet frame to
the appropriate Ethernet Transmit packet queue. In the Software CRC configuration, the packet is
processed by a CRC-32 checking microengine before being enqueued to an Ethernet transmit
packet.
In the reverse direction, Ethernet frames are received on the Ethernet ports by the Ethernet receive
microengine(s), which perform IP lookup and RFC1812 checks. The packets are then enqueued on
the appropriate queues to be consumed by the ATM transmit microengine. In the software CRC
configuration Figure 9, the PDUs are first processed by a CRC generation microengine before
going to the ATM Transmit microengine.
Figure 7. IXP1240 1xATM OC-12 and 8xEthernet 100Mbps Microengine Partitioning
A9634-01
Port4
Ethernet RX
Port5
Port6
Port7
Ethernet
Ethernet
Ethernet
Ethernet
OC-12 Port
OC-12 Port
PktQ
PktQ
PktQ
PktQ
PktQ
PktQ
PktQ
PktQ
Scheduler
Ethernet TX
Fill
Fill
Fill
Port0
Ethernet RX
Port1
Port2
Port3
Fill
ATM TX
Fill
Fill
Unused
IP Route
IPR
IP Route
IP Route
IP Route
Port 8
ATM RX
Port 8
Port 8
Port 8
Ethernet
Ethernet
Ethernet
Ethernet
Ethernet
Ethernet
Ethernet
Ethernet
Ethernet
Ethernet
Ethernet
Ethernet
MSGQ
MSGQ
MSGQ
Legend:
= Thread
= Microengine
= Physical Port
= Scratchpad
Memory
= SRAM = MSGQ