IXP1200 Network Processor Family ATM OC-3/12/Ethernet IP Router Example Design
56 Application Note
Modified on: 3/20/02,
7.0 Simulation Support (Scripts, etc.)
Simulation support for this example design is provided by using a combination of the Foreign
Model DLLs (libraries linked to the Transactor simulator), with interpreted Transactor scripts (.ind
files).
The IP Route Table Manager and associated RFC1812 utilities are implemented in the rtm_dll.dll
foreign model. The ATM VC table manager and associated utilities are implemented in the
atm_utils.dll foreign model. Entry points in these DLLs, such as route_populate() and atm_init()
are called from the atm_ether_init.ind Transactor script upon initialization. DLL entry points are
also available from the Transactor command line interface. The same utilities are compiled into the
atm_utils.o VxWorks kernel module, and are thus available at the VxWorks command prompt.
Some simple C programs are also provided to check the Developer’s Workbench output files for
correct output data (i.e. CRC verification for PDUs; and integrity of output stream). See the
README.txt file for more details.
8.0 Limitations
This design supports the entire ATM VC name space. However, the implementation has 16K
buffers, and thus can support simultaneous reassembly of no more than 16K PDUs. The buffer
limitation comes from two sources.
•The fixed-length 2KB DRAM buffers must fit in physical memory. 16K 2 KB buf fers co nsume
32MB of DRAM.
•The Ethernet Transmit Packetq implementation can address only 16K buffer descriptors.
9.0 Extending the Example Design
This example design shows how microcode handles "fast-path" data-plane processing. It queues
exception packets to the StrongARM core where they are simply discarded. Customers can supply
their own software running on the StrongARM core to process these packets.
•This design supports only AAL5. The ATM receiver with its VC table, and the ATM
Transmitter could be modified to support other AALs.
•This design does not support ATM traffic shaping. However, this code could be applied to
other configurations where threads are dedicated to traffic shaping.
•This design does not support ATM receive policing, but the ATM receiver could be enhanced
to do so.
•Switched Virtual Circuits (SVCs) are not implemented, only Permanent Virtual Circuits
(PVCs) are currently implemented.