Interrupts

FROM

RESET

Y

I BIT

IN CCR

SET?

N

 

 

 

 

IRQ/PORT B

Y

 

Y

CLEAR IRQ

KEYSCAN

EIMSK

REQUEST

EXTERNAL

 

CLEAR?

 

 

 

LATCH.

INTERRUPTS

 

 

 

N

N

INTERNAL Y

CMT

INTERRUPT

N

INTERNAL Y

CORE TIMER

INTERRUPT

N

 

 

 

 

STACK

 

 

 

 

PC, X, A, CCR.

 

 

 

 

 

 

FETCH NEXT

 

 

 

 

INSTRUCTION.

 

 

SET I BIT IN

 

 

 

 

CC REGISTER.

 

 

 

 

 

 

SWI

Y

LOAD PC FROM

INSTRUCTION

 

 

APPROPRIATE

 

 

?

 

 

VECTOR.

 

N

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

YRTI

INSTRUCTION

?

 

 

 

 

N

 

 

 

 

 

 

 

RESTORE REGISTERS

 

EXECUTE

 

 

INSTRUCTION.

 

FROM STACK: CCR, A, X, PC.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 4-1.Interrupt Processing Flowchart

General Release Specification

 

MC68HC05RC16 — Rev. 3.0

 

 

 

40

Interrupts

MOTOROLA