Carrier Modulator Transmitter (CMT)

9.4.2 Carrier Generator Data Registers (CHR1, CLR1, CHR2, and CLR2)

The carrier generator contains two, 7-bit data registers: primary high time (CHR1), primary low time (CLR1); and two, 6-bit data registers: secondary high time (CHR2) and secondary low time (CLR2). Bit 7 of CHR1 and CHR2 is used to read and write the IRO latch.

Address:

$0010

 

 

 

 

 

 

 

 

 

Bit 7

6

5

4

3

2

1

Bit 0

Read:

 

 

 

 

 

 

 

 

 

IROLN

 

0

PH5

PH4

PH3

PH2

PH1

PH0

Write:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset:

0

 

0

U

U

U

U

U

U

 

U = Unaffected

 

 

 

 

 

 

 

Figure 9-3. Carrier Generator Data Register CHR1

Address:

$0011

 

 

 

 

 

 

 

 

 

Bit 7

6

5

4

3

2

1

Bit 0

Read:

 

 

 

 

 

 

 

 

 

IROLP

 

0

PL5

PL4

PL3

PL2

PL1

PL0

Write:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset:

0

 

0

U

U

U

U

U

U

 

U = Unaffected

 

 

 

 

 

 

 

Figure 9-4. Carrier Generator Data Register CLR1

Address:

$0012

 

 

 

 

 

 

 

 

 

Bit 7

6

5

4

3

2

1

Bit 0

Read:

 

 

 

 

 

 

 

 

 

0

 

0

SH5

SH4

SH3

SH2

SH1

SH0

Write:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset:

0

 

0

U

U

U

U

U

U

 

U = Unaffected

 

 

 

 

 

 

 

Figure 9-5. Carrier Generator Data Register CHR2

General Release Specification

 

MC68HC05RC16 — Rev. 3.0

 

 

 

72

Carrier Modulator Transmitter (CMT)

MOTOROLA