General Release Specification — MC68HC05RC16

Section 6. Low-Power Modes

6.1 Contents

6.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53

6.3 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53

6.4 Stop Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54

6.5 Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54

6.6 Low-Power Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55

6.2 Introduction

This section describes the low-power modes.

6.3 Stop Mode

The STOP instruction places the MCU in its lowest power-consumption mode. In stop mode, the internal oscillator is turned off, halting all internal processing, including timer operation.

During stop mode, the CTCSR ($08) bits are altered to remove any pending timer interrupt request and to disable any further timer interrupts. The timer prescaler is cleared. The I bit in the CCR is cleared to enable external interrupts. All other registers and memory remain unaltered. All input/output lines remain unchanged.

NOTE: The EIMSK bit is not cleared automatically by the execution of a STOP instruction. Care should be taken to clear this bit before entering stop mode.

MC68HC05RC16 — Rev. 3.0

 

General Release Specification

 

 

 

MOTOROLA

Low-Power Modes

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