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Motorola
MVME177
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MVME177
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Characteristics SpeciÞcations
Error codes
Signal Adaptations
Programmable Tick Timers
Controls and Indicators
Reset Switch S2
Diagnostic Facilities
Setup Instructions
Additions to Flash Commands
Bit J1 Pins Description
Page 11
Image 11
List of Figures
MVME177 Switches, Headers, Connectors, Polyswitches,
and LEDs
2-5
MVME177 Block Diagram
4-3
Page 10
Page 12
Page 11
Image 11
Page 10
Page 12
Contents
MVME177
Single Board Computer Installation and Use Manual
Restricted Rights Legend
Preface
Page
Adjusting
This equipment. Use extreme caution when handling, testing
Page
Contents
Page
Page
Flash Fill Test B-48Flash Patterns Test B-49
List of Figures
List of Tables
Model Number Speed Major Differences
Introduction
Model Designations
MVME177 Model Designations
Feature Description
Features
MVME177 Features
Cooling Requirements
Specifications
MVME177 Specifications
Characteristics SpeciÞcations
FCC Compliance
General Description
MVME712AM
Bbram
MVME712M MVME712A MVME712AM MVME712B
Equipment Required
System V/68
Related Documentation
Document Title Number
Motorola
Support Information
Manual Terminology
Unpacking Instructions
Hardware Preparation and Installation
What you will need to do Refer to
Overview of Start-up Procedure
Start-up Overview
Examine and/or change
Appears
You may also wish to obtain
Initialize the clock
Hardware Preparation
MVME177 Switches, Headers, Connectors, Polyswitches LEDs
Header Number Description ConÞguration Jumpers
Configuring MVME177 Headers
1MB Eprom
MVME177 Header Notes
Header Number Description ConÞguration
Do not remove all jumpers from J2. This may Disable the Sram
Setup Instructions
Bit J1 Pins Description
MVME177 Module Installation Instructions
MVME177 Module Installation Instructions
Hardware Preparation and Installation
System Considerations
Hardware Preparation and Installation
MVME177 Module Installation Instructions
Hardware Preparation and Installation
Abort Switch S1
Controls and Indicators
Reset Switch S2
Front Panel Indicators DS1 DS4
Normal Address Range
Memory Maps
Local Bus Memory Map
Software Address
Range Devices Accessed Port Size Inhibit
Local Bus Memory Map
Local I/O Devices Memory Map
Address Range Devices Accessed Port Size
$FFF77000 $FFF77FFF Reserved
Multi-MPU Programming Considerations
Local Reset Operation
Software Initialization
Sysreset
Operating Instructions
Data Bus Structure
Functional Description Introduction
MVME177 Functional Description
MPU
Scsi
Block
Flash Memory
MC68060 MPU
Flash Memory and Eprom
Jumper or Control Bit Control Condition Memory ConÞguration
Eprom and Flash Control and Configuration
Eprom
Sram
Do not short circuit
Onboard Dram
Battery Backed Up RAM and Clock
Interfaces
VMEbus Interface
RXD CTS DCD TXD RTS DTR
Serial Port Interface
TXD RTS DTR
Parallel Port Interface
Ethernet Interface
Scsi Termination
Local Resources
Scsi Interface
Software-Programmable Hardware Interrupts
Programmable Tick Timers
Watchdog Timer
Local Bus to Dram Cycle Times
Module Identification
Timing Performance
Local Bus Time-out
Scsi Transfers
ROM Cycle Times
LAN DMA Transfers
Remote Status and Control
AEIA-232-D Interconnections
Table A-1. EIA-232-D Interconnections
Pin Signal Number Mnemonic Signal Name and Description
Pin
Number Mnemonic Signal Name and Description
Levels of Implementation
Sample Configurations
Signal Adaptations
Figure A-1. Middle-of-the-Road EIA-232-D Configuration
Figure A-2. Minimum EIA-232-D Connection
Proper Grounding
EIA-232-D Interconnections
Description of 177Bug
Overview of M68000 Firmware
Debugger General Information
177Bug Implementation
Autoboot
Autoboot in progress... To abort hit Break
ROMboot
Network Boot
Restarting the System
Abort
Reset
Break
MPU Clock Speed Calculation
SYSFAIL* Assertion/Negation
Memory Requirements
Terminal Input/Output Control
Blocks Versus Sectors
Disk I/O Support
Debugger General Information
IOC IOP IOT MAR MAW
Device Probe Function
IOP Physical I/O to Disk
Disk I/O via 177Bug Commands IOI Input/Output Inquiry
IOC I/O Control
BO Bootstrap Operating System
BH Bootstrap and Halt
IOT I/O Teach
Dskcfig
Network I/O Support
Default 177Bug Controller and Device Parameters
Disk I/O Error Codes
UDP/IP Protocol Modules
Intel 82596 LAN Coprocessor Ethernet Driver
Tftp Protocol Module
Bootp Protocol Module
RARP/ARP Protocol Modules
Multiprocessor Control Register Mpcr Method
Network Boot Control Module
Network I/O Error Codes
Multiprocessor Support
Status codes that may be set by the bus master are
Gcsr Method
Diagnostic Facilities
Test Group Description
Table B-1. Diagnostic Test Groups
Entering Debugger Command Lines
Using the 177Bug Debugger
Boldface strings
Syntactic Variables
Data Type Base IdentiÞer Examples
Expression as a Parameter
Expression Result In Hex
String Numeric Value Literal
Table B-2. Debugger Address Parameter Formats
Address as a Parameter
Address Formats
Offset Registers
177BugMD 1327CDI
Port Numbers
IOP
Entering and Debugging Programs
177Bug Vector Table and Workspace
Exception Vectors Used by 177Bug
Hardware Functions
Vector Offset Exception 177Bug Facility
Table B-3. Exception Vectors Used by 177Bug
Using 177Bug Target Vector Table
Creating a New Vector Table
Except SUBQ.L
177Bug Generalized Exception Handler
177BugMD A7&30
Floating Point Data Types
Floating Point Support
Integer Data Types
This format would appear in memory as
Single Precision Real
Packed Decimal Real
Double Precision Real
Extended Precision Real
Scientific Notation
Additions to Flash Commands
Diagflash erase
Flash Test Configuration Acceptable Entries
Erase Test
Flash Fill Test
Diagflash fill
Flash Patterns Test
Figure B-1. Three Possible Mapping Options
Default Flash Test Configuration
Sflash Command
Sflashl Pflash ff800000 ff9fffff ffa00000
177Bug Debugger Command Set
Cnfg I M
Table B-4. Debugger Commands
Command Command Line Mnemonic Title Syntax
BI Range B W L
IOI CL
ENV D
Nopa n
Niot H a
R n a
PA n
VER E
Or SET nC
Debugger General Information
First Second Controller Type
Disk/Tape Controller Modules Supported
Controller Device
Disk/Tape Controller Default Configurations
Controller Address Device
Device Type
Controller
MVME323 -- Four Devices
Controller LUN Address Device LUN Device Type
MVME328 -- Fourteen Devices
Floppy Types and Formats IOT Parameter
IOT Command Parameters for Supported Floppy Types
Other
Configure Board Information Block
Commands
Configure and Environment Commands
ENV D
Set Environment to Bug/Operating System
= EFFFFFFF?
Master Starting Address #2 = 00000000?
ENV Parameter and Options Default Meaning of Default
Table D-1. ENV Command Parameters
LUN
Network Auto Boot
Memory Search Starting Address
$02 refer to the Memory Requirements
Accessible by the VMEbus. Default is
Slave Ending Address #2
Master Ending Address #3
Short I/O VMEbus A16 Control
Network Controller Modules Supported
ENetwork Controller Data
Clun Dlun
Controller Interface Type
Condition Possible Problem Try This
Table F-1. Basic Troubleshooting Steps
CTRL-Q
Envd CR
Set mmddyyhhmm CR
De CR
Env CR
St CR
Index
Index
IN-7
IN-8
IN-9
IN-10
XON/XOFF
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