MVME323 -- Four Devices, Controller | Motorola MVME177 instruction

					Disk/Tape Controller Default Configurations
		MVME323 -- Four Devices

	Controller			Device
	LUN	Address		LUN		Device Type

	8	$FFFFA000		0		ESDI Winchester hard drive
				1		ESDI Winchester hard drive
				2		ESDI Winchester hard drive
	9	$FFFFA200		2		ESDI Winchester hard drive
				3		ESDI Winchester hard drive

		MVME327A --Nine Devices

	Controller			Device
	LUN	Address		LUN		Device Type

	2	$FFFFA600		00		SCSI Common Command Set
				10		(CCS), which may be any of these:
				20		- Fixed direct access
	3	$FFFFA700		20		- Fixed direct access
				30		- Removable ßexible direct access
				30		(TEAC style)
				40		(TEAC style)
				40		- CD-ROM
				50		- CD-ROM
				50		- Sequential access
				60		- Sequential access
				60

				80		Local ßoppy drive
				81		Local ßoppy drive

C

C-3

Image 141

Motorola MVME177 manual MVME323 -- Four Devices, Controller

Contents

MVME177 Single Board Computer Installation and Use Manual Restricted Rights Legend Preface Page Adjusting This equipment. Use extreme caution when handling, testingPage Contents Page Page Flash Fill Test B-48Flash Patterns Test B-49 List of Figures List of Tables Model Designations IntroductionMVME177 Model Designations Model Number Speed Major Differences Features MVME177 FeaturesFeature Description Cooling Requirements Speciﬁcations MVME177 Speciﬁcations Characteristics SpeciÞcations FCC Compliance General Description MVME712AM Bbram MVME712M MVME712A MVME712AM MVME712B Equipment Required System V/68 Related Documentation Document Title Number Motorola Support Information Manual Terminology Unpacking Instructions Hardware Preparation and Installation Overview of Start-up Procedure Start-up OverviewWhat you will need to do Refer to You may also wish to obtain AppearsInitialize the clock Examine and/or change Hardware Preparation MVME177 Switches, Headers, Connectors, Polyswitches LEDs Header Number Description ConÞguration Jumpers Conﬁguring MVME177 Headers 1MB Eprom MVME177 Header Notes Header Number Description ConÞguration Do not remove all jumpers from J2. This may Disable the Sram Setup Instructions Bit J1 Pins Description MVME177 Module Installation Instructions MVME177 Module Installation Instructions Hardware Preparation and Installation System Considerations Hardware Preparation and Installation MVME177 Module Installation Instructions Hardware Preparation and Installation Abort Switch S1 Controls and Indicators Reset Switch S2 Front Panel Indicators DS1 DS4 Memory Maps Local Bus Memory MapNormal Address Range Range Devices Accessed Port Size Inhibit Local Bus Memory MapSoftware Address Local I/O Devices Memory Map Address Range Devices Accessed Port Size $FFF77000 $FFF77FFF Reserved Local Reset Operation Software InitializationMulti-MPU Programming Considerations Sysreset Operating Instructions Functional Description Introduction MVME177 Functional DescriptionData Bus Structure MPU Scsi Block MC68060 MPU Flash Memory and EpromFlash Memory Jumper or Control Bit Control Condition Memory ConÞguration Eprom and Flash Control and Conﬁguration Eprom Sram Do not short circuit Onboard Dram Battery Backed Up RAM and Clock Interfaces VMEbus Interface RXD CTS DCD TXD RTS DTR Serial Port Interface TXD RTS DTR Parallel Port Interface Ethernet Interface Local Resources Scsi InterfaceScsi Termination Programmable Tick Timers Watchdog TimerSoftware-Programmable Hardware Interrupts Timing Performance Module IdentiﬁcationLocal Bus Time-out Local Bus to Dram Cycle Times Scsi Transfers ROM Cycle Times LAN DMA Transfers Remote Status and Control AEIA-232-D Interconnections Table A-1. EIA-232-D Interconnections Pin Signal Number Mnemonic Signal Name and Description Number Mnemonic Signal Name and Description Levels of ImplementationPin Sample Conﬁgurations Signal Adaptations Figure A-1. Middle-of-the-Road EIA-232-D Conﬁguration Figure A-2. Minimum EIA-232-D Connection Proper Grounding EIA-232-D Interconnections Description of 177Bug Overview of M68000 Firmware Debugger General Information 177Bug Implementation Autoboot Autoboot in progress... To abort hit Break ROMboot Network Boot Restarting the System Abort Reset Break MPU Clock Speed Calculation SYSFAIL* Assertion/Negation Memory Requirements Terminal Input/Output Control Blocks Versus Sectors Disk I/O Support Debugger General Information IOC IOP IOT MAR MAW Device Probe Function IOP Physical I/O to Disk Disk I/O via 177Bug Commands IOI Input/Output Inquiry BH Bootstrap and Halt BO Bootstrap Operating SystemIOT I/O Teach IOC I/O Control Dskcfig Default 177Bug Controller and Device Parameters Disk I/O Error CodesNetwork I/O Support UDP/IP Protocol Modules Intel 82596 LAN Coprocessor Ethernet Driver Bootp Protocol Module RARP/ARP Protocol ModulesTftp Protocol Module Network I/O Error Codes Network Boot Control ModuleMultiprocessor Support Multiprocessor Control Register Mpcr Method Status codes that may be set by the bus master are Gcsr Method Diagnostic Facilities Test Group Description Table B-1. Diagnostic Test Groups Entering Debugger Command Lines Using the 177Bug Debugger Boldface strings Syntactic Variables Data Type Base IdentiÞer Examples Expression as a Parameter Expression Result In Hex String Numeric Value Literal Address as a Parameter Address FormatsTable B-2. Debugger Address Parameter Formats Offset Registers 177BugMD 1327CDI Port Numbers IOP Entering and Debugging Programs 177Bug Vector Table and Workspace Exception Vectors Used by 177Bug Hardware Functions Vector Offset Exception 177Bug Facility Table B-3. Exception Vectors Used by 177Bug Using 177Bug Target Vector Table Creating a New Vector Table Except SUBQ.L 177Bug Generalized Exception Handler 177BugMD A7&30 Floating Point Support Integer Data TypesFloating Point Data Types This format would appear in memory as Single Precision Real Double Precision Real Extended Precision RealPacked Decimal Real Scientiﬁc Notation Additions to Flash Commands Erase Test Flash Test Conﬁguration Acceptable EntriesFlash Fill Test Diagflash erase Diagflash fill Flash Patterns Test Figure B-1. Three Possible Mapping Options Default Flash Test Conﬁguration Sflash Command Sflashl Pflash ff800000 ff9fffff ffa00000 177Bug Debugger Command Set Command Command Line Mnemonic Title Syntax Table B-4. Debugger CommandsBI Range B W L Cnfg I M IOI CL ENV D R n a Niot H aPA n Nopa n VER E Or SET nC Debugger General Information First Second Controller Type Disk/Tape Controller Modules Supported Controller Address Device Disk/Tape Controller Default ConﬁgurationsDevice Type Controller Device Controller MVME323 -- Four Devices Controller LUN Address Device LUN Device Type MVME328 -- Fourteen Devices Floppy Types and Formats IOT Parameter IOT Command Parameters for Supported Floppy Types Other Conﬁgure Board Information Block Commands Configure and Environment Commands ENV D Set Environment to Bug/Operating System = EFFFFFFF? Master Starting Address #2 = 00000000? ENV Parameter and Options Default Meaning of Default Table D-1. ENV Command Parameters LUN Network Auto Boot Memory Search Starting Address $02 refer to the Memory Requirements Accessible by the VMEbus. Default is Slave Ending Address #2 Master Ending Address #3 Short I/O VMEbus A16 Control Network Controller Modules Supported ENetwork Controller Data Clun Dlun Controller Interface Type Condition Possible Problem Try This Table F-1. Basic Troubleshooting Steps CTRL-Q Envd CR Set mmddyyhhmm CR Env CR St CRDe CR Index Index IN-7 IN-8 IN-9 IN-10 XON/XOFF