Manuals
/
Motorola
/
Computer Equipment
/
Laptop
Motorola
MVME177
manual
Debugger General Information
Models:
MVME177
1
138
171
171
Download
171 pages
43 Kb
135
136
137
138
139
140
141
142
Characteristics SpeciÞcations
Error codes
Signal Adaptations
Programmable Tick Timers
Controls and Indicators
Reset Switch S2
Diagnostic Facilities
Setup Instructions
Additions to Flash Commands
Bit J1 Pins Description
Page 138
Image 138
Debugger General Information
B
B-58
Page 137
Page 139
Page 138
Image 138
Page 137
Page 139
Contents
Single Board Computer Installation and Use Manual
MVME177
Restricted Rights Legend
Preface
Page
This equipment. Use extreme caution when handling, testing
Adjusting
Page
Contents
Page
Page
Flash Fill Test B-48Flash Patterns Test B-49
List of Figures
List of Tables
MVME177 Model Designations
Introduction
Model Designations
Model Number Speed Major Differences
Features
MVME177 Features
Feature Description
Specifications
Cooling Requirements
Characteristics SpeciÞcations
MVME177 Specifications
General Description
FCC Compliance
MVME712AM
Bbram
Equipment Required
MVME712M MVME712A MVME712AM MVME712B
Related Documentation
System V/68
Motorola
Document Title Number
Support Information
Manual Terminology
Hardware Preparation and Installation
Unpacking Instructions
Overview of Start-up Procedure
Start-up Overview
What you will need to do Refer to
Initialize the clock
Appears
You may also wish to obtain
Examine and/or change
Hardware Preparation
MVME177 Switches, Headers, Connectors, Polyswitches LEDs
Configuring MVME177 Headers
Header Number Description ConÞguration Jumpers
1MB Eprom
Header Number Description ConÞguration
MVME177 Header Notes
Do not remove all jumpers from J2. This may Disable the Sram
Setup Instructions
Bit J1 Pins Description
MVME177 Module Installation Instructions
MVME177 Module Installation Instructions
Hardware Preparation and Installation
System Considerations
Hardware Preparation and Installation
MVME177 Module Installation Instructions
Hardware Preparation and Installation
Controls and Indicators
Abort Switch S1
Reset Switch S2
Front Panel Indicators DS1 DS4
Memory Maps
Local Bus Memory Map
Normal Address Range
Range Devices Accessed Port Size Inhibit
Local Bus Memory Map
Software Address
Address Range Devices Accessed Port Size
Local I/O Devices Memory Map
$FFF77000 $FFF77FFF Reserved
Local Reset Operation
Software Initialization
Multi-MPU Programming Considerations
Sysreset
Operating Instructions
Functional Description Introduction
MVME177 Functional Description
Data Bus Structure
MPU
Block
Scsi
MC68060 MPU
Flash Memory and Eprom
Flash Memory
Eprom and Flash Control and Configuration
Jumper or Control Bit Control Condition Memory ConÞguration
Eprom
Sram
Do not short circuit
Onboard Dram
Battery Backed Up RAM and Clock
VMEbus Interface
Interfaces
Serial Port Interface
RXD CTS DCD TXD RTS DTR
TXD RTS DTR
Parallel Port Interface
Ethernet Interface
Local Resources
Scsi Interface
Scsi Termination
Programmable Tick Timers
Watchdog Timer
Software-Programmable Hardware Interrupts
Local Bus Time-out
Module Identification
Timing Performance
Local Bus to Dram Cycle Times
ROM Cycle Times
Scsi Transfers
Remote Status and Control
LAN DMA Transfers
AEIA-232-D Interconnections
Pin Signal Number Mnemonic Signal Name and Description
Table A-1. EIA-232-D Interconnections
Number Mnemonic Signal Name and Description
Levels of Implementation
Pin
Signal Adaptations
Sample Configurations
Figure A-1. Middle-of-the-Road EIA-232-D Configuration
Figure A-2. Minimum EIA-232-D Connection
Proper Grounding
EIA-232-D Interconnections
Overview of M68000 Firmware
Description of 177Bug
Debugger General Information
Autoboot
177Bug Implementation
Autoboot in progress... To abort hit Break
ROMboot
Network Boot
Restarting the System
Reset
Abort
Break
SYSFAIL* Assertion/Negation
MPU Clock Speed Calculation
Memory Requirements
Terminal Input/Output Control
Disk I/O Support
Blocks Versus Sectors
Debugger General Information
Device Probe Function
IOC IOP IOT MAR MAW
Disk I/O via 177Bug Commands IOI Input/Output Inquiry
IOP Physical I/O to Disk
IOT I/O Teach
BO Bootstrap Operating System
BH Bootstrap and Halt
IOC I/O Control
Dskcfig
Default 177Bug Controller and Device Parameters
Disk I/O Error Codes
Network I/O Support
Intel 82596 LAN Coprocessor Ethernet Driver
UDP/IP Protocol Modules
Bootp Protocol Module
RARP/ARP Protocol Modules
Tftp Protocol Module
Multiprocessor Support
Network Boot Control Module
Network I/O Error Codes
Multiprocessor Control Register Mpcr Method
Status codes that may be set by the bus master are
Gcsr Method
Diagnostic Facilities
Table B-1. Diagnostic Test Groups
Test Group Description
Using the 177Bug Debugger
Entering Debugger Command Lines
Syntactic Variables
Boldface strings
Expression as a Parameter
Data Type Base IdentiÞer Examples
String Numeric Value Literal
Expression Result In Hex
Address as a Parameter
Address Formats
Table B-2. Debugger Address Parameter Formats
Offset Registers
177BugMD 1327CDI
Port Numbers
Entering and Debugging Programs
IOP
177Bug Vector Table and Workspace
Hardware Functions
Exception Vectors Used by 177Bug
Table B-3. Exception Vectors Used by 177Bug
Vector Offset Exception 177Bug Facility
Using 177Bug Target Vector Table
Creating a New Vector Table
Except SUBQ.L
177Bug Generalized Exception Handler
177BugMD A7&30
Floating Point Support
Integer Data Types
Floating Point Data Types
Single Precision Real
This format would appear in memory as
Double Precision Real
Extended Precision Real
Packed Decimal Real
Additions to Flash Commands
Scientific Notation
Flash Fill Test
Flash Test Configuration Acceptable Entries
Erase Test
Diagflash erase
Flash Patterns Test
Diagflash fill
Default Flash Test Configuration
Figure B-1. Three Possible Mapping Options
Sflash Command
Sflashl Pflash ff800000 ff9fffff ffa00000
177Bug Debugger Command Set
BI Range B W L
Table B-4. Debugger Commands
Command Command Line Mnemonic Title Syntax
Cnfg I M
ENV D
IOI CL
PA n
Niot H a
R n a
Nopa n
Or SET nC
VER E
Debugger General Information
Disk/Tape Controller Modules Supported
First Second Controller Type
Device Type
Disk/Tape Controller Default Configurations
Controller Address Device
Controller Device
MVME323 -- Four Devices
Controller
MVME328 -- Fourteen Devices
Controller LUN Address Device LUN Device Type
IOT Command Parameters for Supported Floppy Types
Floppy Types and Formats IOT Parameter
Other
Commands
Configure Board Information Block
Configure and Environment Commands
Set Environment to Bug/Operating System
ENV D
= EFFFFFFF?
Master Starting Address #2 = 00000000?
Table D-1. ENV Command Parameters
ENV Parameter and Options Default Meaning of Default
LUN
Network Auto Boot
Memory Search Starting Address
$02 refer to the Memory Requirements
Accessible by the VMEbus. Default is
Slave Ending Address #2
Master Ending Address #3
Short I/O VMEbus A16 Control
ENetwork Controller Data
Network Controller Modules Supported
Controller Interface Type
Clun Dlun
Table F-1. Basic Troubleshooting Steps
Condition Possible Problem Try This
CTRL-Q
Set mmddyyhhmm CR
Envd CR
Env CR
St CR
De CR
Index
Index
IN-7
IN-8
IN-9
IN-10
XON/XOFF
Top
Page
Image
Contents