3 |
Operating Instructions
2. This area is
3. Size is approximate.
4. Cache inhibit depends on devices in area mapped.
5.This area is not decoded. If these locations are accessed and the local bus timer is enabled, the cycle times out and is terminated by a TEA signal.
6.The SRAM has optional battery backup on the MVME177.
The following table focuses on the Local I/O Devices portion of the local bus Main Memory Map.
Table 3-2. Local I/O Devices Memory Map
Address Range | Devices Accessed | Port Size | Size | Notes |
$FFF00000 - $FFF3FFFF | Reserved | 256KB | 5 | |
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$FFF40000 - $FFF400FF | VMEchip2 (LCSR) | D32 | 256B | 1,4 |
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$FFF40100 - $FFF401FF | VMEchip2 (GCSR) | 256B | 1,4 | |
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$FFF40200 - $FFF40FFF | Reserved | 3.5KB | 5,7 | |
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$FFF41000 - $FFF41FFF | Reserved | 4KB | 5 | |
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$FFF42000 - $FFF42FFF | PCCchip2 | 4KB | 1 | |
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$FFF43000 - $FFF430FF | MCECC #1 | D8 | 256B | 1 |
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$FFF43100 - $FFF431FF | MCECC #2 | D8 | 256B | 1 |
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$FFF43200 - $FFF43FFF | MCECCs (repeated) | 3.5KB | 1,7 | |
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$FFF44000 - $FFF44FFF | Reserved | 4KB | 5 | |
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$FFF45000 - $FFF451FF | CD2401 (Serial Comm. Cont.) | 512B | 1,9 | |
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$FFF45200 - $FFF45DFF | Reserved | 3KB | 7,9 | |
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$FFF45E00 - $FFF45FFF | Reserved | 512B | 1,9 | |
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$FFF46000 - $FFF46FFF | 82596CA (LAN) | D32 | 4KB | 1,8 |
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$FFF47000 - $FFF47FFF | 53C710 (SCSI) | D32/D8 | 4KB | 1 |
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$FFF48000 - $FFF4FFFF | Reserved | 32KB | 5 | |
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$FFF50000 - $FFF6FFFF | Reserved | 128KB | 5 | |
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$FFF70000 - $FFF76FFF | Reserved | 28KB | 6 | |
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