Nortel Networks MSC8101 ADS MODCK1-3 Driven, END if Drive Poreset Impulse Reconfig Using BCSR4

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

SM73228X = (F_PD[] == 2);-- 8MByte (1 X 8 MByte bank )

-- Declare 4 Flash Banks:

FLASH_BANK1 = ( SM73228X # (SM73248X & !A8) # ( SM73288X & !A7 & !A8)) ; FLASH_BANK2 = ((SM73248X & A8) # (SM73288X & !A7 & A8)) ; FLASH_BANK3 = (A7 & !A8 & SM73288X) ;

FLASH_BANK4 = (A7 & A8 & SM73288X) ;

-- Assign the appropriate Flash Chip Select:

F_Cs1~ = !((!F_Cs0~ & FLASH_BANK1 & FROM_FLASH_CNFG_WORD) #

(!F_Cs0~ & FLASH_BANK1 & !FROM_FLASH_CNFG_WORD & !FROM_HOST_CNFG_WORD & HARD_RESET_ACTIVE~)); F_Cs2~ = !((!F_Cs0~ & FLASH_BANK2 & FROM_FLASH_CNFG_WORD) #

(!F_Cs0~ & FLASH_BANK2 & !FROM_FLASH_CNFG_WORD & !FROM_HOST_CNFG_WORD & HARD_RESET_ACTIVE~)); F_Cs3~ = !((!F_Cs0~ & FLASH_BANK3 & FROM_FLASH_CNFG_WORD) #

(!F_Cs0~ & FLASH_BANK3 & !FROM_FLASH_CNFG_WORD & !FROM_HOST_CNFG_WORD & HARD_RESET_ACTIVE~)); F_Cs4~ = !((!F_Cs0~ & FLASH_BANK4 & FROM_FLASH_CNFG_WORD) #

(!F_Cs0~ & FLASH_BANK4 & !FROM_FLASH_CNFG_WORD & !FROM_HOST_CNFG_WORD & HARD_RESET_ACTIVE~));

%

******************************************************************************

*MODCK[1-3] DRIVEN

******************************************************************************

%

MODCK_TRI[1..3]= (MODCK1r,MODCK2r,MODCK3r);

BNK_TRI[2]= TRI(MODCK_TRI[1], !HARD_RESET_ACTIVE~); BNK_TRI[1]= TRI(MODCK_TRI[2], !HARD_RESET_ACTIVE~); BNK_TRI[0]= TRI(MODCK_TRI[3], !HARD_RESET_ACTIVE~); MODCK_BNK[0..2]= BNK_TRI[0..2];

%

******************************************************************************

*BOOT FROM SERIAL EEPROM

******************************************************************************

%

EEPROM_ENABLE = !SBOOT_EN~ # (BTM0 AND !BTM1);

IF (FETHIEN~ AND EEPROM_ENABLE) THEN SBOOTEN_OUT~ = GND; -- boot from serial EEPROM

ELSE	SBOOTEN_OUT~ = VCC;
END IF;

%

******************************************************************************

*DRIVE PORESET IMPULSE (RECONFIG USING BCSR4)

******************************************************************************

%

DivEn.s = GND; DivEn.r = GND;

DivEn.prn = !(MPC_WRITE_BCSR_4 & (D[0..1] == B”10”)) & !END_OF_WD_TIMER;

--Preset to FF when write b’10 bit to BCSR4 DivEn.clrn = !END_OF_IMPULSE & PRST~;

END_OF_IMPULSE = POR_IMPULSE1.dv2 & POR_IMPULSE1.dv4 & POR_IMPULSE1.dv8 & POR_IMPULSE1.dv16 &

POR_IMPULSE2.dv2 & POR_IMPULSE2.dv4 & POR_IMPULSE2.dv8 & POR_IMPULSE2.dv16; POR_IMPULSE1.g = VCC;

POR_IMPULSE2.g = VCC;

POR_IMPULSE2.clk = POR_IMPULSE1.dv16;

POR_IMPULSE1.clr = !DivEn.q; -- Start first cascade divider if zero POR_IMPULSE2.clr = !DivEn.q; -- Start second cascade divider if zero R_PORI~ = OPNDRN(!DivEn.q); -- Drive PORESET with updated MODCK values

%

******************************************************************************

* WATCHDOG FOR AUTO RECONFIGURATION

******************************************************************************

% -- WD Start/Stop by writing B”01xxxxxx” into BCSR4 -- when count value will be achived PORESET is forced

MOTOROLA MSC8101ADS RevB User’s Manual C-117

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