Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

TABLE B1-5. P4 - Host Interface Connector - Interconnect Signals

Pin No.

Signal Name

Attribute

Description

 

 

 

 

 

 

 

 

30

HDS

I

Host Data Strobe or Host Write Data Strobe. For further

 

 

 

explanation see P2/A24 in TABLE B1-3. "P2 - CPM

 

 

 

Expansion - Interconnect Signals" above.

 

 

 

 

31

HRESETb

I/O, P.U

MSC8101’s Hard Reset. For further explanation see P1/C10 in

 

 

 

TABLE B1-2. "P1 - System Expansion - Interconnect

 

 

 

Signals" above.

 

 

 

 

32

PORSTb

I/O, P.U

Power-On-Reset. For further explanation see P1/B20 in TABLE

 

 

 

B1-2. "P1 - System Expansion - Interconnect Signals"

 

 

 

above.

 

 

 

 

33

3V3

P

+3.3V Power Out. These lines are connected to the main 3.3V

 

 

 

plane of the MSC8101ADS.

 

 

 

 

34

N.C.

-

Not connected.

 

 

 

 

35

GND

P

Digital GND. Main GND plane.

 

 

 

 

36

 

 

 

 

 

 

 

B•1•5

P5, P7, P8, P9, P10, P13, P14 - Logic Analyzer Connectors

These are 38 pin, SMT, high density, matched impedance connector made by AMP. They contain all MSC8101 signals unbuffered. The pinout of these connectors is shown in MSC8101ADS Sche- matics.

B•1•6

P6 - JTAG/OnCE Port Connector

P6 is a Motorola standard JTAG/ONCE connector for the DSP. It is a 14 pin 90o two row header connector with key. The pinout of P6 is shown in TABLE B1-6. "P6 - JTAG/ONCE Connector - In- terconnect Signals" below:

TABLE B1-6. P6 - JTAG/ONCE Connector - Interconnect Signals

 

Pin No.

Signal Name

Attribute

Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

TDI

I

Transmit Data In. This is the JTAG serial data input of the ADS,

 

 

 

 

 

sampled on the rising edge of TCK.

 

 

 

 

 

 

 

 

2

GND

P

Digital GND. Main GND plane.

 

 

 

 

 

 

 

 

3

TDO

O

Transmit Data Output. This the MSC8101’s JTAG serial data

 

 

 

 

 

output driven by Falling edge of TCK.

 

 

 

 

 

 

 

 

4

GND

P

Digital GND. Main GND plane.

 

 

 

 

 

 

 

 

5

TCK

I

Test port Clock. This clock shifts in / out data to / from the

 

 

 

 

 

MSC8101ADS JTAG logic. Data is driven on the falling edge of

 

 

 

 

 

TCK and is sampled both internally and externally on it’s rising

 

 

 

 

 

edge.

 

 

 

 

 

TCK is pulled up internally by the MSC8101.

 

 

 

 

 

 

 

 

6

GND

P

Digital GND. Main GND plane.

 

 

 

 

 

 

 

 

7

N.C.

-

Not Connected.

 

 

 

 

 

 

 

 

8

KEY

-

No pin in connector. Serve for correct plug insertion. Not

 

 

 

 

 

Connected.

 

 

 

 

 

 

 

 

 

 

 

 

 

B-92

MSC8101ADS RevB User’s Manual

MOTOROLA

For More Information On This Product,

Go to: www.freescale.com

Page 93
Image 93
Nortel Networks MSC8101 ADS user manual Table B1-6. P6 JTAG/ONCE Connector Interconnect Signals, B16, Hds, Key