Nortel Networks MSC8101 ADS Fethmdio PC12, PC7, PC6, SMCTX1PC5, SMCRX1PC4, HA0, HA1, HA2, HA3

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

TABLE B1-3. P2 - CPM Expansion - Interconnect Signals

Pin No.	Signal Name	Attribute	Description
D20	FETHMDIO (PC12)	I/O, T.S.	Fast-Ethernet Port Management Data I/O. This signal serves as
			bidirectional serial data line, qualified by FETHMDC, to allow read
			/ write the LXT970’s internal registers.
			When the Ethernet port is disabled, this line may be used for any
			available function of PC12.
D21	HREQTRQ	O, T.S.	When the HDI16 is enabled and programmed to interface to a
			single host request, this pin is the host request output (HREQ).
			This pin can be used for host DMA requests in host DMA mode.
			When the HDI16 is programmed to interface to a double host
			request, this pin is the transmit host request output (HTRQ).
			Tristated when HDI16 is disabled. Present as well as at P4
			connector.
D22	N.C.	-	Not connected.
D23
D24	HRRQACK	I/O, T.S.	When the HDI16 is enabled and programmed to interface to a
			single host request, this pin is the host acknowledge Schmitt
			trigger input in host DMA mode (HACK). The polarity of the host
			DMA acknowledge is programmable. When the HDI16 is
			programmed to interface to a double host request, this pin is the
			receive host request output (HRRQ). The direction of this line
			may be programmed by BCSR0/1. See TABLE 5-9. "BCSR0
			Description" on page 55.
D25	PC7	I/O, T.S.	MSC8101’s Port C (7:6) Parallel I/O lines. May be used to any of
			their available functions.
D26	PC6
D27	SMCTX1(PC5)	I/O, T.S.	When RS232 port #2 is enabled, this signal is the transmit data
			line for SMC1 port. When this port is disabled, this signal may be
			used to any available alternate function for PC5.
D28	SMCRX1(PC4)	I/O, T.S.	When RS232 port #2 is enabled, this signal is the receive data
			line for SMC1 port. When this port is disabled, this signal may be
			used to any available alternate function for PC4.
D29	HA0	I	Host Interface Address Line 0. Tristated when Host I/F is
			disabled. Present as well as at P4 connector.
D30	HA1	I	Host Interface Address Line 1. Tristated when Host I/F is
			disabled. Present as well as at P4 connector.
D31	HA2	I	Host Interface Address Line 2. Tristated when Host I/F is
			disabled. Present as well as at P4 connector.
D32	HA3	I	Host Interface Address Line 3. Tristated when Host I/F is
			disabled. Present as well as at P4 connector.

a. The functions in parenthesis, are MSC8101’s parallel I/Os. b. Normally connected to ATMTFCLK on the ADS.

c. MS bit.

d. For that matter, both 100-Base-T and 10-Base-T.

MOTOROLA MSC8101ADS RevB User’s Manual B-89

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