ATMRXD7 PA17, ATMRXD6 PA16, L1TXDPA9 | Nortel Networks MSC8101 ADS

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

TABLE B1-3. P2 - CPM Expansion - Interconnect Signals

Pin No.	Signal Name	Attribute	Description


B15	ATMRXD7 (PA17)	I/O, T.S.	ATM Receive Data (7c:0). When the ATM port is enabled, this bus
			carries the cell octets, read from the PM5350 receive FIFO. This
B16	ATMRXD6 (PA16)
B16	ATMRXD6 (PA16)		lines are updated on the rising edge of ATMRFCLKb.
			When the ATM port is disabled, these lines are tristated and may
B17	ATMRXD5 (PA15)
B17	ATMRXD5 (PA15)		be used for any available respective function.
			be used for any available respective function.
B18	ATMRXD4 (PA14)

B19	ATMRXD3 (PA13)

B20	ATMRXD2 (PA12)

B21	ATMRXD1 (PA11)

B22	ATMRXD0 (PA10)

B23	L1TXD(PA9)	I/O, T.S.	TDMA port transmit data. May be used for CODEC or T1/E1
			applications. When TDMA port is disabled this line may be used
			for any available function of PA9 Port A.

B24	L1RXD(PA8)	I/O, T.S.	TDMA port receive data. May be used for CODEC or T1/E1
			applications. When TDMA port is disabled this line may be used
			for any available function of PA8 Port A.

B25	L1TSYNC(PA7)	I/O, T.S.	TDMA port transmit frame sync input. In fact this pin used as PA8
			Port A.

B26	L1RXSYNC(PA6)	I/O, T.S.	TDMA port frame sync input. May be used for CODEC or T1/E1
			applications. When TDMA port is disabled this line may be used
			for any available function of PA8 Port A.

B27	PA5	I/O, T.S.	MSC8101’s Port A (5:2) Parallel I/O lines. May be used to any of
			their available functions.
B28	PA4		their available functions.
B28	PA4

B29	PA3

B30	PA2

B31	HD14	I/O, T.S.	Host Interface Bidirectional Data Port D14 and D15. Present as
			well as at P4 connector.
B32	HD15		well as at P4 connector.
B32	HD15


C1	FETHTXER (PB31)	I/O, T.S.	Fast-EthernetdTransmit Error (H). When the Ethernet port is
			enabled, this signal will be asserted (High) by the MSC8101 when
			an error is discovered in the transmit data stream. When the port
			is operation at 100 Mbps, the LXT970 responds by sending
			invalid code symbols on the line.
			When the Ethernet port is disabled, this line may be used for any
			available function of PB31.

C2	FETHRXDV (PB30)	I/O, T.S.	Fast-Ethernet Receive Data Valid (H). When this signal is
			asserted (High) while the Fast Ethernet port is enabled and
			FETHRXCK goes high, it indicates that data is valid on the MII
			Receive Data lines - FETHRXD(3:0).
			When the Fast Ethernet port is disabled, this line is tristated and
			may be used for any available function of PB30.

MOTOROLA

MSC8101ADS RevB User’s Manual

B-85

For More Information On This Product,

Go to: www.freescale.com

Image 86

Nortel Networks MSC8101 ADS ATMRXD7 PA17, ATMRXD6 PA16, ATMRXD5 PA15, ATMRXD4 PA14, ATMRXD3 PA13, ATMRXD2 PA12, L1TXDPA9

Contents

MSC8101 ADS MSC8101ADS RevB User’s Manual Contents ATM on LD14 BOM Freescale Semiconductor, Inc List of Figures Viii List of Tables Freescale Semiconductor, Inc Related Documentation IntroductionAbbreviations’ List Characteristics Specifications SpecificationMSC8101ADS Specifications ADS Features Freescale Semiconductor, Inc Semiconductor, Inc Hardware Preparation MSC8101ADS Top Side Part Location diagram Setting HReset Configuration Source Setting The Core Supply Voltage LevelSetting MODCK13 For Initial PLLs’ Multiplication Factor SW9 OnCE Connection Scheme Host I/F Operation Stand Alone Operation Host System Debug Scheme B 34 +5V Power Supply Connection JTAG/OnCE Connector P6 Host I/F Connector P4 P6 JTAG/OnCE Port Connector P4 Host I/F Connector Terminal to MSC8101ADS RS-232 Connection Flash Memory Simm Installation 38 10/100-Base-T Ethernet Port Connection Flash Memory Simm Insertion Host I/F Setting SW1 Emulator Enable EE SW2 Data Bus Width Setting SW5 & SW6 Abort Switch SW3Soft Reset Sreset Switch SW4 Configuration Switch SW9 Hard Reset Hreset Switch SW7Power-On Reset Switch Preset SW8 Modck Available Clock Mode SettingBoot Mode Select SW10 CPM Jumpers Software Options Switch SW11431 JP1 DLL Disable 432 JP2 Clock Buffer Set 437 JP9 5V power supply for Codec 433 JP3 50 Ohm Enable436 JP6,JP7 MIC Enable 434 JP4 VPP Source Selector LEDs ATM RX Indicator LD6 Ethernet Link Indicator LD4Fast Ethernet Clsn Indicator LD5 ATM TX Indicator LD7 MSC8101’s Registers’ Programming Memory Controller Registers Programming SIU Registers’ ProgrammingSystem Initialization Memory Controller Initialization for 10050a MHz Memory Controller Initialization for 10050a MHz Mbmr Power On Reset Configuration Reset & Reset ConfigurationPower- On Reset Manual Hard Reset Summary Reset Configuration Schemes Hard Reset Configuration Word Manual Soft Reset IRQ2 Local Interrupter Clock Generator Bus Buffering Chip Select Generator Synchronous Dram Bank MSC8101ADS Chip Select Assignments Bus Timing Machine Sdram MHz Sdram Mode Register ProgrammingSdram Programming Sdram Refresh Cycle Type \ Flash Delay nsecFlash Memory Simm Flash Simm Connection Scheme Flash Programming Voltage Communication Ports Ports Function Enable MSC8101 I/O Ports/Name 581 ATM Port 582 100/10 Base T Port 5831 CS4221 Programming CS4221 ProgrammingAudio Codec 585 RS232 Ports CS4221 Programming584 T1/E1 Ports Host I/F Board Control & Status Register Bcsr Host I/F Interconnect signalsDMA off-board tool BIT Mnemonic BCSR0 DescriptionBCSR0 Board Control / Status Register PON ATT DEF Hostcsp BCSR1 Board Control / Status Register BCSR0 Description10. BCSR1 Description Fethien 10. BCSR1 DescriptionPON ATT DEF Atmrst Fethrst BCSR2 Board Control / Status Register 11. Peripheral’s Availability Decoding12. BCSR2 Description 14. Flash Presence Detect 41 Encoding 12. BCSR2 Description13. Flash Presence Detect 75 Encoding BCSR3 Board Status Register 15. BCSR3 Description 18. ADS Revision Encoding 16. EXTOOLI03 Assignment17. External Tool Revision Encoding Engineering PPC Bus Memory Map MSC8101ADS Memory Map FF000000 Ffffffff MSC8101ADS Memory MapFE000000 Ffffffff FF800000 Ffffffff Power rails ADS Power Scheme 712 3V Bus Off-Board Application Maximum Current Consumption711 5V Bus 713 5V Bus Appendix a MSC8101 Bill of Material A1 BOM Table A-1. MSC8101ADS Bill Of Material Freescale Inc Inc Dale Freescale Semiconductor Freescale Semiconductor, Inc Appendix B Support Information Interconnect Signals B11 Table B1-2. P1 System Expansion Interconnect Signals TSTAT1 GNDTSTAT0 TSTAT2 TSTAT3 TSTAT4 TSTAT5 Clkx Damage to the PM5350 ATM UNI EXPD2 EXPD0EXPD1 EXPD3 EXPCTL0 SCC1RXD PD30 Table B1-3. P2 CPM Expansion Interconnect SignalsB12 MSC8101ADS’s P2 CPM Expansion Connector Hwrds SPICLKPD18SPIMOSIPD17 PD7 Atmrfclk Atmtsoc PA29Atmrsoc PA27 Atmrca PA26 ATMRXD5 PA15 ATMRXD7 PA17ATMRXD6 PA16 ATMRXD4 PA14 Fethcol PB27 Fethtxen PB29Fethrxer PB28 Fethcrs PB26 HD2 HD0HD1 HD3 Atmfclk PC26 Fethmdc PC13 PC6 Fethmdio PC12PC7 SMCTX1PC5 B13 Table B1-4. P3 ISP Connector Interconnect SignalsB14 P4 Host Interface Connector Hack HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9HA1 HA2 HA3 HCS1 Hreq B16 Table B1-6. P6 JTAG/ONCE Connector Interconnect SignalsB15 P5, P7, P8, P9, P10, P13, P14 Logic Analyzer Connectors HDS B18 P15,P16 SMB Connectors Table B1-7. P12 Ethernet Port Interconnect SignalsB17 P12 Ethernet Port Connector B19 P17,P18 Double RJ45 T1/E1 Line Connectors B110 P19,P21,P24 Stereo Phone Jack Connectors B111 P20,P22,P23,P25 RCA Jack Connectors B112 P26 5V Power Supply Connectors Table B1-10. P27A Interconnect SignalsTable B1-11. P27B Interconnect Signals B113 P27A,B RS232 Ports’ Connectors Freescale Semiconductor, Inc Appendix C Program Information Freescale Semiconductor, Inc Logic Equations C11 First Include File C12 Second Include file C13 Main File Constant SIZE1 Constant SHIFTLENGTH= Length of HRD/HRW Delay Shifter SIZE0Constant EE45HOLDVALUE Constant SRESET~ Constant TCPCDEFAULT0 Constant TCPCDEFAULT1HDIMDEN~ Host SW Enable RSTCNF~ Output HRESET~ Bidir HDIEN~ SBOOTENOUT~SPARE1 Output HRRQEN~ WDTIMER3 WDTIMER1WDTIMER2 WDTIMER4 BCSR1 SBOOTEN~ EepromenableResets Cleartowdctrl Scndcfgbyteread Thirdcfgbyteread Fourthcfgbyteread BCSR1PONDEF0..SIZE1 BCSR3IRQ0 BCSR3PONDEF0..SIZE3 BCSR0 BCSR0PONCONST0..5 Begin DefaultsEND Defaults END if END Generate EEDPONDEFAULT,RSV37PONDEFAULTElse PSDVAL~ = Opndrnvcc EE PinsRegularpoweronreset = RPORI~ == Regularponresetactive END if Else Hdiwr = If Hdds thenIf !HDSP then Hdiwr = END if Else Elsif MPCWRITEBCSR5 then Elsif MPCWRITEBCSR1 thenElsif MPCWRITEBCSR4 then Elsif MPCWRITEBCSR6 then Elsif MPCREADBCSR3 then SIGNALLAMP1~ Elsif MPCREADBCSR1 thenIf MPCREADBCSR0 then Elsif Firstcfgbyteread then HRESET~ =SRESET~ = Elsif Scndcfgbyteread then Else SIGLAMP1OUT~ Then SIGLAMP0OUT~ = GND ElseThen SIGLAMP1OUT~ END if If !T1234EN~ & FETHIEN~ then 116 MODCK1-3 Driven END if Drive Poreset Impulse Reconfig Using BCSR4Watchdog for Auto Reconfiguration 118