Internal Registers

-Setting commit levels and PCI burst levels

-Interfacing via the management interface to the PHY registers

-Determining status interrupts

-Setting eight bytes of default PCI configuration data if the EEPROM checksum is bad

-Setting the various unicast and multicast addresses

-Providing network statistics

-Setting the LEDs and implementing a BIOS ROM

The NetCmd register is used to set many of the diagnostic modes such as wrap, copy short frames (CSF), copy all frames (CAF), no broadcast (NOBRX), duplex, and token ring frame formats. It also includes a reset bit, which is used to allow changes in the NetConfig register for additional network configuration options.

NetSio, the network serial I/O register, is used to control the MDIO/MDCLK management interface. It is also used to communicate with an EEPROM, us- ing the EDIO/EDCLK serial interface. This register can also enable or disable PHY interrupts.

The NetSts and NetMask registers work in tandem to determine the nature of a status interrupt. The bits in the NetMask register are used to mask whether the status flags in NetSts cause interrupts or not.

The NetConfig register sets network configuration options during reset. This register can only be written to when ThunderLAN is in reset (NRESET = 0). It allows the controller to receive CRCs (RxCRC), pass errored frames (PEF), use a one-fragment list on receive (refer to subsection 5.3, One-Fragment Mode, for more information), use a single transmit channel, enable the internal PHY, and select the network protocol (CSMA/CD or demand priority).

The AREG registers allow ThunderLAN to recognize any four 48-bit IEEE 802 address. This includes specific, group, local, or universal addresses. They can be Ethernet or token ring addresses. The HASH registers allow group ad- dressed frames to be accepted on the basis of a hashing table.

The statistics registers hold the appropriate network counters, including good Tx and Rx frames, collisions, deferred frames, and error counters. The LEDs are controlled through the LEDreg register, which directly controls the values output on the LED lines EAD[7::0]. All are, therefore, software programmable. LEDreg can also be used to implement a BIOS ROM. The Acommit register

2-12

Page 34 Page 36
Page 35
Image 35
Texas Instruments TNETE100A, TNETE211, TNETE110A manual Internal Registers
Page 34 Page 36

TNETE110A, TNETE211, TNETE100A specifications

Texas Instruments has been a leader in developing innovative semiconductor solutions, and their Ethernet PHY (Physical Layer Transceiver) family, specifically the TNETE100A, TNETE211, and TNETE110A, exemplifies this commitment to excellence. These devices are designed to address the needs of a variety of applications, ranging from industrial automation to consumer electronics.

The TNETE100A is a highly versatile Ethernet PHY capable of supporting 10/100 Mbps Ethernet connectivity. One of its main features is the low power consumption, which makes it an ideal choice for battery-operated devices. It incorporates advanced power management technologies, ensuring that the device operates efficiently while maintaining high performance. The TNETE100A also supports Auto-Negotiation, allowing for seamless communication between devices at different speeds, thereby enhancing flexibility in network configurations.

Moving to the TNETE211, this device supports 10/100/1000 Mbps Ethernet, making it suitable for high-speed networking applications. This PHY integrates features such as Energy Efficient Ethernet (EEE), which reduces power consumption during low-traffic periods, aligning with the contemporary demand for energy efficiency in networking equipment. The TNETE211 is engineered with robust EMI (Electromagnetic Interference) performance and provides multiple interface options, making it a versatile choice for embedded systems and networking applications.

The TNETE110A stands out in the lineup as a sophisticated device that supports both Fast Ethernet and Gigabit Ethernet. This PHY utilizes advanced signal processing techniques to ensure superior link robustness and performance in noisy environments. Its features include an integrated transformer driver, which simplifies PCB design and allows for compact device layouts. Additionally, the TNETE110A is designed to be fully compliant with Ethernet standards, ensuring reliable interoperability with other network components.

All three PHYs leverage Texas Instruments' expertise in integrated circuit design, resulting in low jitter and high signal integrity, essential for modern communication standards. They are optimized for a wide range of temperatures, making them suitable for harsh industrial applications. With built-in diagnostic capabilities, these devices also enable efficient fault detection and troubleshooting in network infrastructures.

In summary, the Texas Instruments TNETE100A, TNETE211, and TNETE110A are exemplary Ethernet PHY devices, each tailored to meet specific networking needs while adhering to stringent efficiency and performance criteria. Their advanced features, technologies, and reliability make them pivotal components in today's fast-paced digital landscape.
Top Page Image Contents