Adapter Internal Registers

A.3.15 Interrupt Disable Register - INTDIS @ 0x48 (DIO) (BYTE 0)

This register is used to disable RX EOC, RX EOF and TX EOC interrupts. TX EOF can be disabled by setting to Tx interrupt threshold value to a zero. This register is only written to while the ThunderLAN Controller is reset. (NRE- SET=0)

Byte 0

 

 

 

 

 

 

 

7

6

5

4

3

2

1

0

 

 

Reserved

 

 

TX EOC

RX EOF

RX EOC

Table A±18. Demand Priority Error Counters

Bit Name Function

7 ± 3

Reserved

2TX EOC{ Disable Transmit End of Channel Select: When this bit is set to 1, all transmit channels of TX EOC interrupts are disabled. Default value is 0.

1

RX EOF

Disable Receive End of Frame Select: When this bit is set to 1, RX EOF interrupts are

 

 

disabled. Default value is 0.

 

 

 

0RX EOC{ Disable Receive End of Channel Select: When this bit is set to 1, the receive channel of RX EOC interrupts are disabled. Default value is 0.

²Refer to Chapter 5 List Structures to determine how transmit and receive channels can be checked to insure they are disabled.

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Texas Instruments TNETE110A Interrupt Disable Register Intdis @ 0x48 DIO Byte, Table A±18. Demand Priority Error Counters
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