Texas Instruments TNETE110A, TNETE211 Finding the Controller in Memory and I/O Space, Pciiobaselo

Initializing

3.1.2Finding the Controller in Memory and I/O Space

To access the host registers, the I/O base address must be determined. This I/O base is needed, since the host registers are accessed as I/O ports. The I/O base address register in the ThunderLAN controller has the LSB hardwired to high. This code does an O/S call to read a 32-bit word from PCI_MEMBASELO in the configuration space belonging to this board's PCI device ID. If the first base register is not an I/O register, the second base register location is checked. If an I/O base register is found, it is stored away in the structure nic. If neither of the first two locations is a valid I/O base register, an error is declared and the program is ended. Note that the configuration space was originally supplied with a space request and the operating system as part of the power-on self test (POST) supplied the card with sufficient address space by filling in the RAM bits in the base registers.

#define PCI_MEMBASELO		0x10	//low	memory base
address	register
#define	PCI_IOBASELO	0x14	//low	I/O base address
register

...

nic.IoBase = PciRdWord(nic.DevId,PCI_MEMBASELO); if (!(nic.IoBase & 1))

{

nic.IoBase = PciRdWord(nic.DevId,PCI_IOBASELO); if (!(nic.IoBase & 1))

error(ºPCI Config failed: Unexpected non-I/O address foundº);

}

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