Intel 41210 manual Clock Stretch

System Management Bus Interface

Figure 6. DWord Configuration Read Protocol (SMBus Block Write/Block Read, PEC Enabled)

S

11X0_XXX

W A

Cmd = 11010010

A

Byte Count = 4

A

Bus Number

A Device/Function A Reg Number [15:8] A

Reg Number [7:0] A

PEC

Clock Stretch

A P

S

11X0_XXX

W

A

Cmd = 11010010

A

Sr

11X0_XXX

R

A

Byte Count = 5

A

Status

A

Data[31:24]

A

Data[23:16]

A

Data[15:8]

A

Data[7:0]

A

PEC

N P

B3187-01

Figure 7. DWord Configuration Read Protocol (SMBus Word Write/Word Read, PEC Enabled)

S 11X0_XXX

W A

Cmd = 10010001

A

Bus Number

A

Device/Function

A

PEC

A P

S 11X0_XXX

W A

Cmd = 01010001

A

Register Num [15:8]

A

Register Num [7:0]

A

PEC

Clock Stretch

A P

S	11X0_XXX	W	A	Cmd = 10010001	A
Sr	11X0_XXX	R	A	Status	A	Data[31:24]	A		PEC	N	P
S	11X0_XXX	W	A	Cmd = 00010001	A
Sr	11X0_XXX	R	A	Data[23:16]	A	Data[15:8]	A		PEC	N	P
S	11X0_XXX	W	A	Cmd = 01010000	A
Sr	11X0_XXX	R	A	Data[7:0]	A	PEC	N	P

B3188-01

58 Intel® 41210 Serial to Parallel PCI Bridge Developer’s Manual