Intel 31154 manual Wiring Lengths for Picmg 1.2 Backplane, Segment AD Bus Units

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PCI-X Layout Guidelines

Figure 16. PCI-X Data Bus PICMG 1.2 Style Backplane

Intel® 31154 133 MHz
	PCI Bridge
	Slot1	Slot2	Slot3	Slot4	Slot5	Slot6	Slot7	Slot8
Device
Card Stub	W1	W2	W3	W4	W5	W6	W7	W8
Edge Connector
	W9	W10	W11	W12	W13		W14	W15
Backplane
								B3331-01

Table 20. Wiring Lengths for PICMG 1.2 Backplane

Segment	AD Bus		Units
Segment			Units
	Minimum Length	Maximum Length

W1	0.75	2.75	inches

W2	0.75	2.75	inches

W3	0.75	2.75	inches

W4	0.75	2.75	inches

W5	0.75	2.75	inches

W6	0.75	2.75	inches

W7	0.75	2.75	inches

W8	0.75	2.75	inches

W9	1.2	1.2	inches

W10	0.8	0.8	inches

W11	0.8	0.8	inches

W12	0.8	0.8	inches

W13	0.8	0.8	inches

W14	0.8	0.8	inches

W15	0.8	0.8	inches

54	Intel® 31154 133 MHz PCI Bridge Design Guide Design Guide

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Contents Intel 31154 133 MHz PCI Bridge Design Guide Design GuideIntel 31154 133 MHz PCI Bridge Design Guide Contents Figures TablesContents Revision History Date Revision Description001 Initial release Terminology and Definition Sheet 1 About This DocumentTerminology and Definitions DefinitionISI Terminology and Definition Sheet 2Term SHBProduct Overview PCI-to-PCI Bridge ConfigurationsIntroduction2 Intel 31154 133 MHz PCI Bridge ApplicationsFeatures List Features ListRelated External Specifications ReferencesThis page Intentionally Left Blank Package Information Intel 31154 133 MHz PCI Bridge Package Intel 31154 133 MHz PCI Bridge Ball Map-Top View, Left Side Intel 31154 133 MHz PCI Bridge Ball Map-Top View, Right Side Interface Signals Total Signal CountTotal Signal Count JtagThis page Intentionally Left Blank Terminations4 Pull-Up/Pull-Down Terminations Sheet 1Secondary PCI Signals Pull-Up/Pull-Down Terminations Sheet 2Pull-Up/Pull-Down Terminations Sheet 3 PCI ClocksPull-Up/Pull-Down Terminations Sheet 4 Hot SwapHardware Straps sampled at the edge of PRST# SarbdisablePull-Up/Pull-Down Terminations Sheet 5 SarblockPull-Up/Pull-Down Terminations Sheet 6 Serial EepromPull-Up/Pull-Down Terminations Sheet 7 VoltagesMiscellaneous RSRV1/CRSTEN Pull-Up/Pull-Down Terminations Sheet 8RSTV0 SM66ENPull-Up/Pull-Down Terminations Sheet 9 NTMASK#This page Intentionally Left Blank Interrupt Routing PCI/PCI-X InterfacePCI/PCI-X Voltage Levels PCI/PCI-X Voltage LevelsIdsel Lines Primary Idsel LineSecondary Idsel Lines Secondary Idsel Masking CompactPCI* Hot Swap Mode SelectOpaque Memory Region Enable Secondary Clock ControlPrimary PCI Clocking Mode Secondary PCI Clocking ModePCI-X Initialization Clocking Modes PCI-X Clocking Modes Secondary Bus Frequency InitializationGND Clock Frequency Primary-to-Secondary Frequency LimitsPCI-X Initialization Pattern MHzRouting Guidelines Crosstalk Crosstalk Effects on Trace Distance and HeightPCB Ground Layout Around Connectors EMI ConsiderationsDecoupling Recommendations Power Distribution and DecouplingPins Voltage Capacitor Value Number Intel 31154 133 MHz PCI Bridge Decoupling RecommendationsTrace Impedance This page Intentionally Left Blank PCI-X Layout Guidelines Add-in Card Routing ParametersPCI Clock Layout Guidelines #### PCI-X Topology Layout Guidelines PCI-X Slot GuidelinesLower AD Bus Upper AD Bus Segment Wiring Lengths for 133 MHz SlotSingle Slot at 133 MHz MaximumWiring Lengths for Embedded 133 MHz Design Lower AD Bus Upper AD BusWiring Lengths for 100 MHz Dual-Slot Dual-Slot at 100 MHzWiring Lengths for Embedded 100 MHz Design W13 Wiring Lengths for 66 MHz Quad-Slot Sheet 1Quad-Slots at 66 MHz W14Wiring Lengths for 66 MHz Quad-Slot Sheet 2 Wiring Lengths for Embedded 66 MHz Design Minimum LengthEmbedded PCI-X Specification Picmg 1.2 Overview PCI-X at 33 MHzAn Example of an ePCI-X System Wiring Lengths for Picmg 1.2 Backplane Segment AD Bus UnitsPCI-X Clock Wiring Lengths for Picmg Backplane Clock Point to PointThis page Intentionally Left Blank Power Considerations Analog Power PinsPower Sequencing Customer Reference Board EepromCustomer Reference Board Stackup Debug Connectors and Logic Analyzer Connectivity10 Probing PCI-X SignalsLogic Analyzer Pod Trdy FrameDevsel BE2Irdy AD31 PCI-X Signal Name § § This page Intentionally Left Blank Thermal Solutions Operational PowerVoltage Maximum Power Thermal Solutions Design Reference Material References12Related Documents Design Reference MaterialReferences