Spectrum Brands MI.61XX manual Powerdown and reset, Example program for the board initialization

Page 40

Powerdown and reset

Programming the Board

 

 

Example program for the board initialization

The following example is only an exerpt to give you an idea on how easy it is to initialize a Spectrum board.

//----- Initialization of PCI Bus Boards -----------------------------------

if (SpcInitPCIBoards (&nCount, &nPCIBusVersion) != ERR_OK) return;

if (nCount == 0)

{

printf ("No Spectrum board found\n"); return;

}

// -----

request and print Board type and some information ------------------

SpcGetParam (hDrv, SPC_PCITYP,

&lBrdType);

SpcGetParam

(hDrv,

SPC_PCIMEMSIZE,

&lInstMemsize);

SpcGetParam

(hDrv,

SPC_PCISERIALNO,

&lSerialNumber);

//----- print the board type depending on bus. Board number is always the lower 16 bit of type -----

switch (lBrdType & TYP_SERIESMASK)

{

case TYP_MISERIES:

printf ("Board found:

MI.%x sn: %05d\n", lBrdType & 0xffff, lSerialNumber);

break;

 

case TYP_MCSERIES:

MC.%x sn: %05d\n", lBrdType & 0xffff, lSerialNumber);

printf ("Board found:

break;

 

case TYP_MXSERIES:

MX.%x sn: %05d\n", lBrdType & 0xffff, lSerialNumber);

printf ("Board found:

break;

 

}

 

printf ("Memory on board: %ld MBytes (%ld MSamples)\n", lInstMemsize /1024/1024, lInstMemsize /1024/1024 /2);

printf ("Serial Number: %05ld\n", lSerialNumber);

Powerdown and reset

Every Spectrum board can be set to powerdown mode by software. In this mode the board is therefore consuming less power than in normal operation mode. The amount of saved power is board dependant. Please refer to the technical data section for details. The board can be set to normal mode again either by performing a reset as mentioned below or by starting the board as described in the according chapters later in this manual.

If the board is set to powerdown mode or a reset is performed the data in the on-board will be no longer valid and cannot be read out or replayed again.

Performing a board reset or powering down the board can be easily done by the related board commands mentioned in the following table.

Register

Value

Direction

Description

SPC_COMMAND

0

r/w

Command register of the board.

 

SPC_POWERDOWN

30

Sets the board to powerdown mode. The data in the on-board memory is no longer valid and cannot be read out or

 

 

 

replayed again. The board can be set to normal mode again by the reset command or by starting the boards.

 

SPC_RESET

0

A software and hardware reset is done for the board. All settings are set to the default values. The data in the board’s

 

 

 

on-board memory will be no longer valid.

40

MI.61xx Manual

Image 40
Contents MI.61xx English version October 5Page Hardware Installation Software Driver InstallationIntroduction SoftwareFifo Mode Programming the BoardAnalog Outputs Standard generation modesOption Gated Replay Option Extra I/OSynchronization Option AppendixIntroduction PrefaceGeneral Information PrefaceMI.6110 MI.6111 Different models of the MI.61xx seriesIntroduction Extra I/O Option -XMF Additional optionsExtra I/O Option -XIO Starhub Introduction Additional optionsSpectrum type plate Block diagram Technical Data Hardware informationDynamic Parameters Order informationHardware informationIntroduction FilterInstalling the board in the system Hardware InstallationSystem Requirements Installing a board with digital inputs/outputs Installing a board with extra I/O Option -XMFInstalling multiple boards synchronized by starhub Mounting the wired boardsHooking up the boards Only use the included flat ribbon cablesInstalling multiple synchronized boards Software Driver Installation Software Driver InstallationInterrupt Sharing Windows InstallationVersion control Driver Update Windows Software Driver Installation Windows Windows XP Windows XP Windows NT Adding boards to the Windows NT driverLinux OverviewInstalling the device Now it is possible to access the board using this deviceDriver info Automatic load of the driverSoftware Software OverviewFirst Test with SBench Software++ Driver Interface Header filesMicrosoft Visual C++ Linux Gnu COther Windows C/C++ compilers National Instruments LabWindows/CVIDriver functions Include DriversFunction SpcSetParam Function SpcSetParamFunction SpcSetData Windows Function SpcGetDataSpectrum GmbH Delphi Pascal Programming Interface Type definitionInclude Driver ExamplesDelphi Pascal Programming Interface Visual Basic Examples Visual Basic Programming InterfaceVBA for Excel Examples Visual Basic Programming Interface Error handling Programming the BoardOverview Register tablesExample for error checking InitializationStarting the automatic initialization routine PCI RegisterInstalled memory Hardware versionDate of production Serial numberInstalled features and options Used interrupt lineUsed type of driver Driver versionPowerdown and reset Example program for the board initializationSpcpcimemsize SpcpciserialnoAnalog Outputs Channel SelectionImportant note on channels selection Disabling the outputsSetting up the outputs Output AmplifiersOutput offset Register Value Direction Description Amplitude rangeMaximum Output Range Filter SpecificationsOutput Filters General description Standard generation modesProgramming Standard generation modes Programming Maximum memsizeMaximum posttrigger in MSamples Minimum and stepsize of memsize and posttrigger in samplesStarting without interrupt classic mode Starting with interrupt driven modeCommand register ProgrammingStandard generation modesData organization Writing data with SpcSetDataValue ’start’ as a 32 bit integer value Value ’len’ as a 32 bit integer valueBit Standard Mode Standard modeSample format Fifo Mode General InformationBackground Fifo Write Speed LimitationsProgramming Fifo Mode Software BuffersTheoretical maximum sample rate PCI Bus Throughput 60040 Read out the number of available Fifo buffersFifo Mode Programming Buffer processingAnalog acquisition or generation boards Digital I/O 701x or 702x or pattern generator boardsExample Fifo generation mode == MaxbufSpcfifostart SpcfifowaitProgramming Internally generated sample rate Clock generationStandard internal sample rate External reference clock Using plain quartz with no PLLExternal clocking Minimum external sample rate Direct external clockMaximum external samplerate in MS/s Example External clock with dividerCHANNEL0 CHANNEL1 CHANNEL2 CHANNEL3 Example for setting up the software trigger Trigger modes and appendant registersSoftware trigger External TTL triggerExample on how to set up the board for positive TTL trigger Edge triggersTrigger modes and appendant registers Positive TTL triggerPositive and negative TTL trigger Standard Mode Option Multiple ReplayOutput modes Trigger modesResulting start delays Trigger modes Option Multiple ReplayGeneral information and trigger delay Option Gated ReplayOption Gated Replay Value Direction DescriptionExample program Allowed trigger modesExternal TTL edge trigger Spctriggermode TmttlposOption Extra I/O Digital I/OsChannel direction Transfer DataProgramming example Analog OutputsAnalog Outputs Option Extra I/O Synchronization Option Different synchronization optionsSynchronization with option cascading Synchronization with option starhubSetup order for the different synchronization options Set up the board parametersExample of board setup for three boards Write Data to on-board memory output boards onlyDefine the boards for trigger master Example of board #2 set as trigger master3a Define synchronization or trigger Define the remaining boards as trigger slavesDefine the board for clock master Example board number 0 is clock masterDefine the remaining boards as clock slaves Arm the boards for synchronizationStart all of the trigger master boards Wait for the end of the measurementRead data from the on-board memory acquisition boards only Example for data readingAllocate the Fifo software buffers 2a Write first data for output boardsSpcsyncmasterfifo SpcsyncslavefifoAs trigger slaves Additions for synchronizing different boards General informationCalculating the clock dividers 20xx 30xx 31xx 40xx 45xx 60xx 61xx 70xx 72xxSetting up the clock divider Board type 3122 312040 MS/s Board type 3025 3131Resulting delays using different boards or speeds Delay in standard non Fifo modesDelay in Fifo mode Additions for equal boards with different sample ratesError Codes Error name Value hex Value dec Error descriptionAppendix AppendixExtra I/O with external connectorOption -XMF Pin assignment of the multipin connectorPin assignment of the multipin cable Pin assignment of the internal multipin connector Extra I/O with internal connector Option -XIOD14 D12 D10 D15 D13 D11