Spectrum Brands MI.61XX manual Define the boards for trigger master

Page 69

Synchronization (Option)

The setup order for the different synchronization options

 

 

(3) Define the board(s) for trigger master

At least one board must be set as the trigger master to get synchronization running. Every one of the synchronized boards can be programmed for beeing the trigger master device.

Register

Value

Direction

Description

 

SPC_COMMAND

0

r/w

Command register of the board

 

SPC_SYNCTRIGGERMASTER

101

Defines the according board as the triggermaster.

Example of board #2 set as trigger master

 

 

 

 

 

 

 

 

 

SpcSetParam (hDrv[2], SPC_COMMAND,

SPC_SYNCTRIGGERMASTER);

// Set board 2 to trigger master

 

 

 

 

 

 

(3a) Define synchronization OR trigger

If you use synchronization with the starhub option you can even set up more than one board as the trigger master. The boards will be com- bined by a logical OR and therefore the boards will be started if any of the trigger masters has detected a trigger event.

The synchronization OR-trigger is not available when using the cascading option. It is also not available with starhub option prior to hardware version V4. See the initialization section of this manual to find out how to determint the hardware version of the starhub.

If you set up the boards for the synchronization OR trigger all boards that are set as trigger master must be programmed to the same trigger- mode. If the boards are using different trigger modes this will result in a time shift between the boards. It is of course possible to set different edges or different trigger levels on the channels.

It is only possible to use the synchronization OR trigger if the board carrying the starhub piggy-back module is one of the boards that is programmed as a trigger master.

To find out what board is carrying the starhub piggy-back module you make use of the board’s feature registers as described in the chapter about initialising the board.

Example of setting up three boards to be trigger master

SpcSetParam (hDrv[0], SPC_COMMAND,

SPC_SYNCTRIGGERMASTER);

// Set board 0

to trigger master

SpcSetParam

(hDrv[1],

SPC_COMMAND,

SPC_SYNCTRIGGERMASTER);

// Set

board

1

to

trigger

master

SpcSetParam

(hDrv[2],

SPC_COMMAND,

SPC_SYNCTRIGGERMASTER);

// Set

board

2

to

trigger

master

(4) Define the remaining boards as trigger slaves

As you can set more than one board as the trigger master (starhub option only) you have to tell the driver additionally which of the boards are working as trigger slaves.

Register

Value

Direction

Description

SPC_COMMAND

0

r/w

Command register of the board

 

SPC_SYNCTRIGGERSLAVE

111

Defines the according board as the trigger slave.

Each of the synchronized boards must be set up either as a trigger master or as a trigger slave to get the synchronization option working correctly. Therefore it does not matter if you use the cascading or starhub option.

It is assumed that only one of the three boards (board 2 in this case) is set up as trigger master, as described in (3)

SpcSetParam

(hDrv[0],

SPC_COMMAND,

SPC_SYNCTRIGGERSLAVE);

//

Setting

all the other boards to

SpcSetParam

(hDrv[1],

SPC_COMMAND,

SPC_SYNCTRIGGERSLAVE);

//

trigger

slave is a must !

 

 

 

 

 

 

 

It sometimes might be necessary to exclude one or more boards from the synchronization trigger. An example for this solution is that one or more output boards are used for continuously generating test patterns, while one or more acqusition boards are triggering for test results or error conditions. Therefore it is possible to exclude a board from the triggerbus so that only a synchronization for clock is done and the ac- cording boards are just using the trigger events they have detected on their own.

Register

Value

Direction

Description

SPC_NOTRIGSYNC

200040

r/w

If activated the dedicated board will use its own trigger modes instead of the synchronization trigger.

Even if a board is not using the synchronization trigger, it must have been set as a triggerslave before even if you exclude the board with the SPC_NOTRIGSYNC register.

(c) Spectrum GmbH

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Contents English version October 5 MI.61xxPage Software Driver Installation Hardware InstallationIntroduction SoftwareProgramming the Board Fifo ModeAnalog Outputs Standard generation modesOption Extra I/O Option Gated ReplaySynchronization Option AppendixPreface IntroductionGeneral Information PrefaceDifferent models of the MI.61xx series MI.6110 MI.6111Introduction Additional options Extra I/O Option -XMFExtra I/O Option -XIO Introduction Additional options StarhubSpectrum type plate Hardware information Block diagram Technical DataOrder information Dynamic ParametersHardware informationIntroduction FilterHardware Installation Installing the board in the systemSystem Requirements Installing a board with extra I/O Option -XMF Installing a board with digital inputs/outputsMounting the wired boards Installing multiple boards synchronized by starhubHooking up the boards Only use the included flat ribbon cablesInstalling multiple synchronized boards Software Driver Installation Software Driver InstallationInterrupt Sharing Installation WindowsVersion control Driver Update Windows Software Driver Installation Windows Windows XP Windows XP Adding boards to the Windows NT driver Windows NTOverview LinuxNow it is possible to access the board using this device Installing the deviceDriver info Automatic load of the driverSoftware Overview SoftwareFirst Test with SBench SoftwareHeader files ++ Driver InterfaceMicrosoft Visual C++ Linux Gnu CNational Instruments LabWindows/CVI Other Windows C/C++ compilersDriver functions Include DriversFunction SpcSetParam Function SpcSetParamFunction SpcSetData Windows Function SpcGetDataSpectrum GmbH Type definition Delphi Pascal Programming InterfaceInclude Driver ExamplesDelphi Pascal Programming Interface Visual Basic Programming Interface Visual Basic ExamplesVBA for Excel Examples Visual Basic Programming Interface Programming the Board Error handlingOverview Register tablesInitialization Example for error checkingStarting the automatic initialization routine PCI RegisterHardware version Installed memoryDate of production Serial numberUsed interrupt line Installed features and optionsUsed type of driver Driver versionExample program for the board initialization Powerdown and resetSpcpcimemsize SpcpciserialnoChannel Selection Analog OutputsImportant note on channels selection Disabling the outputsOutput Amplifiers Setting up the outputsOutput offset Register Value Direction Description Amplitude rangeFilter Specifications Maximum Output RangeOutput Filters Standard generation modes General descriptionProgramming Maximum memsize Standard generation modes ProgrammingMaximum posttrigger in MSamples Minimum and stepsize of memsize and posttrigger in samplesStarting with interrupt driven mode Starting without interrupt classic modeCommand register ProgrammingStandard generation modesWriting data with SpcSetData Data organizationValue ’start’ as a 32 bit integer value Value ’len’ as a 32 bit integer valueStandard mode Bit Standard ModeSample format General Information Fifo ModeBackground Fifo Write Speed LimitationsSoftware Buffers Programming Fifo ModeTheoretical maximum sample rate PCI Bus Throughput 60040 Read out the number of available Fifo buffersBuffer processing Fifo Mode ProgrammingAnalog acquisition or generation boards Digital I/O 701x or 702x or pattern generator boards== Maxbuf Example Fifo generation modeSpcfifostart SpcfifowaitProgramming Clock generation Internally generated sample rateStandard internal sample rate Using plain quartz with no PLL External reference clockExternal clocking Direct external clock Minimum external sample rateMaximum external samplerate in MS/s External clock with divider ExampleCHANNEL0 CHANNEL1 CHANNEL2 CHANNEL3 Trigger modes and appendant registers Example for setting up the software triggerSoftware trigger External TTL triggerEdge triggers Example on how to set up the board for positive TTL triggerTrigger modes and appendant registers Positive TTL triggerPositive and negative TTL trigger Option Multiple Replay Standard ModeOutput modes Trigger modesTrigger modes Option Multiple Replay Resulting start delaysOption Gated Replay General information and trigger delayOption Gated Replay Value Direction DescriptionAllowed trigger modes Example programExternal TTL edge trigger Spctriggermode TmttlposDigital I/Os Option Extra I/OChannel direction Transfer DataAnalog Outputs Programming exampleAnalog Outputs Option Extra I/O Different synchronization options Synchronization OptionSynchronization with option cascading Synchronization with option starhubSet up the board parameters Setup order for the different synchronization optionsExample of board setup for three boards Write Data to on-board memory output boards onlyExample of board #2 set as trigger master Define the boards for trigger master3a Define synchronization or trigger Define the remaining boards as trigger slavesExample board number 0 is clock master Define the board for clock masterDefine the remaining boards as clock slaves Arm the boards for synchronizationWait for the end of the measurement Start all of the trigger master boardsRead data from the on-board memory acquisition boards only Example for data reading2a Write first data for output boards Allocate the Fifo software buffersSpcsyncmasterfifo SpcsyncslavefifoAs trigger slaves General information Additions for synchronizing different boardsCalculating the clock dividers 20xx 30xx 31xx 40xx 45xx 60xx 61xx 70xx 72xxBoard type 3122 3120 Setting up the clock divider40 MS/s Board type 3025 3131Delay in standard non Fifo modes Resulting delays using different boards or speedsDelay in Fifo mode Additions for equal boards with different sample ratesError name Value hex Value dec Error description Error CodesAppendix AppendixPin assignment of the multipin connector Extra I/O with external connectorOption -XMFPin assignment of the multipin cable Extra I/O with internal connector Option -XIO Pin assignment of the internal multipin connectorD14 D12 D10 D15 D13 D11
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