Spectrum Brands MI.61XX manual Standard generation modes, General description, Programming

Page 44

General description

Standard generation modes

 

 

Standard generation modes

General description

The generated data is replayed from the on-board memory. These modes allows generating waveforms at very high sample rates without the need to transfer the data into the board’s on-board memory at high speed. These modes are running totally independent from the PC and don’t need any processing power after being started.

Singleshot mode

The singleshot mode is the most simple output mode for the Spectrum boards. It simply replays the programmed data once after detecting the trigger event. The amount of memory to be replayed can be programmed by software. Any trigger source can be used to start the output. If output should be star- ted immediately one can simply use the software trigger ca- pabilities of the board.

Register

Value

Direction

Description

SPC_SINGLESHOT

41000

r/w

Write a „1“ to enable the singleshot mode (a „0“ disables it)

Continuous Mode

After detetcting the trigger event the programmed data is re- played continuously. On reaching end of the programmed memory size the output starts again with the first sample. The- re’s no gap in output when switching from the last sample to the first sample. The output runs until the users stops it by soft- ware. If not stopped the continuous output runs independent of any other PC components until the system is shut off.

Register

Value

Direction

Description

SPC_SINGLESHOT

41000

r/w

Write a „0“ to disable the singleshot mode

SPC_OUTONTRIGGER

41100

r/w

Write a „1“ to enable the continuous mode

Posttrigger Mode

The posttrigger mode is normally only used when starting the output board together with an acquisiton board.

The data is written to a programmed amount of the on-board memory (memsize). After starting the board the output will im- mediately start and continue to loop. At this point the mode is similar to the continuous mode explained above. After detec- ting a rigger event, a certain programmed amount of data is replayed (posttrigger) and then the replay finishes automati- cally.

Register

Value

Direction

Description

SPC_SINGLESHOT

41000

r/w

Write a „0“ to disable the singleshot mode

SPC_OUTONTRIGGER

41100

r/w

Write a „0“ to disable the continuous mode

Programming

Partitioning the memory

The memory size register defines the length of the data to be replayed. Depending on the mode used this data is replayed once or conti- nuously.

Register

Value

Direction

Description

SPC_MEMSIZE

10000

r/w

Sets the memory size in samples per channel.

 

 

 

 

SPC_POSTTRIGGER

10100

r/w

Sets the number of samples to be replayed after the trigger event has been detected.

The maximum memsize that can be use for replaying is of course limited by the installed amount of memory and by the number of channels to be replayed. The following table gives you an overview on the maximum memsize in relation to the installed memory.

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MI.61xx Manual

Page 43 Page 45
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Page 43 Page 45
Contents MI.61xx English version October 5Page Hardware Installation Software Driver InstallationIntroduction SoftwareFifo Mode Programming the BoardAnalog Outputs Standard generation modesOption Gated Replay Option Extra I/OSynchronization Option AppendixIntroduction PrefaceGeneral Information PrefaceIntroduction Different models of the MI.61xx seriesMI.6110 MI.6111 Extra I/O Option -XIO Additional optionsExtra I/O Option -XMF Starhub Introduction Additional optionsSpectrum type plate Block diagram Technical Data Hardware informationDynamic Parameters Order informationHardware informationIntroduction FilterSystem Requirements Hardware InstallationInstalling the board in the system Installing a board with digital inputs/outputs Installing a board with extra I/O Option -XMFInstalling multiple boards synchronized by starhub Mounting the wired boardsHooking up the boards Only use the included flat ribbon cablesInstalling multiple synchronized boards Interrupt Sharing Software Driver InstallationSoftware Driver Installation Version control InstallationWindows Driver Update Windows Software Driver Installation Windows Windows XP Windows XP Windows NT Adding boards to the Windows NT driverLinux OverviewInstalling the device Now it is possible to access the board using this deviceDriver info Automatic load of the driverSoftware Software OverviewFirst Test with SBench Software++ Driver Interface Header filesMicrosoft Visual C++ Linux Gnu COther Windows C/C++ compilers National Instruments LabWindows/CVIDriver functions Include DriversFunction SpcSetParam Function SpcSetParamFunction SpcSetData Windows Function SpcGetDataSpectrum GmbH Delphi Pascal Programming Interface Type definitionInclude Driver ExamplesDelphi Pascal Programming Interface VBA for Excel Examples Visual Basic Programming InterfaceVisual Basic Examples Visual Basic Programming Interface Error handling Programming the BoardOverview Register tablesExample for error checking InitializationStarting the automatic initialization routine PCI RegisterInstalled memory Hardware versionDate of production Serial numberInstalled features and options Used interrupt lineUsed type of driver Driver versionPowerdown and reset Example program for the board initializationSpcpcimemsize SpcpciserialnoAnalog Outputs Channel SelectionImportant note on channels selection Disabling the outputsSetting up the outputs Output AmplifiersOutput offset Register Value Direction Description Amplitude rangeOutput Filters Filter SpecificationsMaximum Output Range Programming Standard generation modesGeneral description Standard generation modes Programming Maximum memsizeMaximum posttrigger in MSamples Minimum and stepsize of memsize and posttrigger in samplesStarting without interrupt classic mode Starting with interrupt driven modeCommand register ProgrammingStandard generation modesData organization Writing data with SpcSetDataValue ’start’ as a 32 bit integer value Value ’len’ as a 32 bit integer valueSample format Standard modeBit Standard Mode Fifo Mode General InformationBackground Fifo Write Speed LimitationsProgramming Fifo Mode Software BuffersTheoretical maximum sample rate PCI Bus Throughput 60040 Read out the number of available Fifo buffersFifo Mode Programming Buffer processingAnalog acquisition or generation boards Digital I/O 701x or 702x or pattern generator boardsExample Fifo generation mode == MaxbufSpcfifostart SpcfifowaitProgramming Standard internal sample rate Clock generationInternally generated sample rate External clocking Using plain quartz with no PLLExternal reference clock Maximum external samplerate in MS/s Direct external clockMinimum external sample rate CHANNEL0 CHANNEL1 CHANNEL2 CHANNEL3 External clock with dividerExample Example for setting up the software trigger Trigger modes and appendant registersSoftware trigger External TTL triggerExample on how to set up the board for positive TTL trigger Edge triggersTrigger modes and appendant registers Positive TTL triggerPositive and negative TTL trigger Standard Mode Option Multiple ReplayOutput modes Trigger modesResulting start delays Trigger modes Option Multiple ReplayGeneral information and trigger delay Option Gated ReplayOption Gated Replay Value Direction DescriptionExample program Allowed trigger modesExternal TTL edge trigger Spctriggermode TmttlposOption Extra I/O Digital I/OsChannel direction Transfer DataAnalog Outputs Option Extra I/O Analog OutputsProgramming example Synchronization Option Different synchronization optionsSynchronization with option cascading Synchronization with option starhubSetup order for the different synchronization options Set up the board parametersExample of board setup for three boards Write Data to on-board memory output boards onlyDefine the boards for trigger master Example of board #2 set as trigger master3a Define synchronization or trigger Define the remaining boards as trigger slavesDefine the board for clock master Example board number 0 is clock masterDefine the remaining boards as clock slaves Arm the boards for synchronizationStart all of the trigger master boards Wait for the end of the measurementRead data from the on-board memory acquisition boards only Example for data readingAllocate the Fifo software buffers 2a Write first data for output boardsSpcsyncmasterfifo SpcsyncslavefifoAs trigger slaves Additions for synchronizing different boards General informationCalculating the clock dividers 20xx 30xx 31xx 40xx 45xx 60xx 61xx 70xx 72xxSetting up the clock divider Board type 3122 312040 MS/s Board type 3025 3131Resulting delays using different boards or speeds Delay in standard non Fifo modesDelay in Fifo mode Additions for equal boards with different sample ratesError Codes Error name Value hex Value dec Error descriptionAppendix AppendixPin assignment of the multipin cable Pin assignment of the multipin connectorExtra I/O with external connectorOption -XMF Pin assignment of the internal multipin connector Extra I/O with internal connector Option -XIOD14 D12 D10 D15 D13 D11
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