Spectrum Brands MI.61XX manual Setting up the outputs, Output Amplifiers, Output offset

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Setting up the outputs	Analog Outputs

Setting up the outputs

Output Amplifiers

This arbitrary waveform generator board uses separate output am- plifiers for each channel. This gives you the possibility to seperately set up the channel outputs to best suit your application

The output amplifiers can easily be set by the corresponding am- plitude registers.

The table below shows the available registers to set up the output amplitude for your type of board.

Register	Value	Direction	Description	Amplitude range
SPC_AMP0	30010	r/w	Defines the amplitude of channel0.	100 mV up to 3000 mV
SPC_AMP1	30110	r/w	Defines the amplitude of channel1.	100 mV up to 3000 mV

SPC_AMP2	30210	r/w	Defines the amplitude of channel2.	100 mV up to 3000 mV

SPC_AMP3	30310	r/w	Defines the amplitude of channel3.	100 mV up to 3000 mV

The amplitude can be changed at any time even if the board is running and outputting a signal to the con- nectors. The board will not be stopped when changing these settings.

Output offset

In many applications an output of symmetrical sig- nals is required. But in some cases, depending on your application, it can be necessary to generate signals that are not symmetrical.

For such cases you can adjust the offset of the out- puts for each channel seperately.

The figure at the right shows some examples, how to set up the offset in combination with different am- plitudes.

Register	Value	Direction	Description		Offset range
SPC_OFFS0	30000	r/w	Defines the output’s offset	and therfore shifts the output of channel0.	± 3000 mV in steps of 1 mV
SPC_OFFS1	30100	r/w	Defines the output’s offset	and therfore shifts the output of channel1.	± 3000 mV in steps of 1 mV

SPC_OFFS2	30200	r/w	Defines the output’s offset	and therfore shifts the output of channel2.	± 3000 mV in steps of 1 mV
SPC_OFFS3	30300	r/w	Defines the output’s offset	and therfore shifts the output of channel3.	± 3000 mV in steps of 1 mV

The offset settings can be changed at any time even if the board is running and outputting a signal to the connectors. The board will not be stopped when changing these settings.

42	MI.61xx Manual

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Contents MI.61xx English version October 5Page Introduction Hardware InstallationSoftware Driver Installation SoftwareAnalog Outputs Fifo ModeProgramming the Board Standard generation modesSynchronization Option Option Gated ReplayOption Extra I/O AppendixGeneral Information IntroductionPreface PrefaceDifferent models of the MI.61xx series MI.6110 MI.6111Introduction Additional options Extra I/O Option -XMFExtra I/O Option -XIO Starhub Introduction Additional optionsSpectrum type plate Block diagram Technical Data Hardware informationHardware informationIntroduction Dynamic ParametersOrder information FilterHardware Installation Installing the board in the systemSystem Requirements Installing a board with digital inputs/outputs Installing a board with extra I/O Option -XMFHooking up the boards Installing multiple boards synchronized by starhubMounting the wired boards Only use the included flat ribbon cablesInstalling multiple synchronized boards Software Driver Installation Software Driver InstallationInterrupt Sharing Installation WindowsVersion control Driver Update Windows Software Driver Installation Windows Windows XP Windows XP Windows NT Adding boards to the Windows NT driverLinux OverviewDriver info Installing the deviceNow it is possible to access the board using this device Automatic load of the driverFirst Test with SBench SoftwareSoftware Overview SoftwareMicrosoft Visual C++ ++ Driver InterfaceHeader files Linux Gnu CDriver functions Other Windows C/C++ compilersNational Instruments LabWindows/CVI Include DriversFunction SpcSetData Windows Function SpcSetParamFunction SpcSetParam Function SpcGetDataSpectrum GmbH Include Driver Delphi Pascal Programming InterfaceType definition ExamplesDelphi Pascal Programming Interface Visual Basic Programming Interface Visual Basic ExamplesVBA for Excel Examples Visual Basic Programming Interface Overview Error handlingProgramming the Board Register tablesStarting the automatic initialization routine Example for error checkingInitialization PCI RegisterDate of production Installed memoryHardware version Serial numberUsed type of driver Installed features and optionsUsed interrupt line Driver versionSpcpcimemsize Powerdown and resetExample program for the board initialization SpcpciserialnoImportant note on channels selection Analog OutputsChannel Selection Disabling the outputsOutput offset Setting up the outputsOutput Amplifiers Register Value Direction Description Amplitude rangeFilter Specifications Maximum Output RangeOutput Filters Standard generation modes General descriptionProgramming Maximum posttrigger in MSamples Standard generation modes ProgrammingMaximum memsize Minimum and stepsize of memsize and posttrigger in samplesCommand register Starting without interrupt classic modeStarting with interrupt driven mode ProgrammingStandard generation modesValue ’start’ as a 32 bit integer value Data organizationWriting data with SpcSetData Value ’len’ as a 32 bit integer valueStandard mode Bit Standard ModeSample format Background Fifo Write Fifo ModeGeneral Information Speed LimitationsTheoretical maximum sample rate PCI Bus Throughput Programming Fifo ModeSoftware Buffers 60040 Read out the number of available Fifo buffersAnalog acquisition or generation boards Fifo Mode ProgrammingBuffer processing Digital I/O 701x or 702x or pattern generator boardsSpcfifostart Example Fifo generation mode== Maxbuf SpcfifowaitProgramming Clock generation Internally generated sample rateStandard internal sample rate Using plain quartz with no PLL External reference clockExternal clocking Direct external clock Minimum external sample rateMaximum external samplerate in MS/s External clock with divider ExampleCHANNEL0 CHANNEL1 CHANNEL2 CHANNEL3 Software trigger Example for setting up the software triggerTrigger modes and appendant registers External TTL triggerTrigger modes and appendant registers Example on how to set up the board for positive TTL triggerEdge triggers Positive TTL triggerPositive and negative TTL trigger Output modes Standard ModeOption Multiple Replay Trigger modesResulting start delays Trigger modes Option Multiple ReplayOption Gated Replay General information and trigger delayOption Gated Replay Value Direction DescriptionExternal TTL edge trigger Example programAllowed trigger modes Spctriggermode TmttlposChannel direction Option Extra I/ODigital I/Os Transfer DataAnalog Outputs Programming exampleAnalog Outputs Option Extra I/O Synchronization with option cascading Synchronization OptionDifferent synchronization options Synchronization with option starhubExample of board setup for three boards Setup order for the different synchronization optionsSet up the board parameters Write Data to on-board memory output boards only3a Define synchronization or trigger Define the boards for trigger masterExample of board #2 set as trigger master Define the remaining boards as trigger slavesDefine the remaining boards as clock slaves Define the board for clock masterExample board number 0 is clock master Arm the boards for synchronizationRead data from the on-board memory acquisition boards only Start all of the trigger master boardsWait for the end of the measurement Example for data readingSpcsyncmasterfifo Allocate the Fifo software buffers2a Write first data for output boards SpcsyncslavefifoAs trigger slaves Calculating the clock dividers Additions for synchronizing different boardsGeneral information 20xx 30xx 31xx 40xx 45xx 60xx 61xx 70xx 72xx40 MS/s Setting up the clock dividerBoard type 3122 3120 Board type 3025 3131Delay in Fifo mode Resulting delays using different boards or speedsDelay in standard non Fifo modes Additions for equal boards with different sample ratesAppendix Error CodesError name Value hex Value dec Error description AppendixPin assignment of the multipin connector Extra I/O with external connectorOption -XMFPin assignment of the multipin cable D14 D12 D10 Pin assignment of the internal multipin connectorExtra I/O with internal connector Option -XIO D15 D13 D11