| Trigger modes |
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| Option Multiple Replay | |
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| Resulting start delays |
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| Sample rate | Output Mode | Activated channels | external TTL trigger | ext. TTL trigger with activated |
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| synchronization |
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| 0 | 1 | 2 | 3 |
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| < 5 MHz | Standard or FIFO | x |
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| 8 samples | 10 samples |
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| > 5 MHz | Standard or FIFO | x |
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| 24 samples | 26 samples |
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| < 2.5 MHz | Standard or FIFO | x | x |
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| 5 samples | 6 samples |
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| > 2.5 MHz | Standard or FIFO | x | x |
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| 14 samples | 15 samples |
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| < 5 MHz | Standard | x |
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| 8 samples | 10 samples |
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| > 5 MHz | Standard | x |
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| 24 samples | 26 samples |
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| < 2.5 MHz | FIFO | x |
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| 5 samples | 6 samples |
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| > 2.5 MHz | FIFO | x |
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| 14 samples | 15 samples |
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| < 2.5 MHz | Standard | x | x | x | x | 5 samples | 6 samples |
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| > 2.5 MHz | Standard | x | x | x | x | 14 samples | 15 samples |
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| < 1.25 MHz | FIFO | x | x | x | x | 3.5 samples (falling clock edge) | 3.5 samples (falling clock edge) |
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| > 1.25 MHz | FIFO | x | x | x | x | 8.5 samples (falling clock edge) | 8.5 samples (falling clock edge) |
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The following example shows how to set up the board for Multiple Replay in standard mode. The setup would be similar in FIFO mode, but the memsize register would not be used.
SpcSetParam (hDrv, | SPC_MULTI, | 1); | // Enables Multiple Replay |
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SpcSetParam (hDrv, | SPC_POSTTRIGGER, | 1024); | // Set the segment size to 1024 samples | to 4096 samples |
SpcSetParam (hDrv, | SPC_MEMSIZE, | 4096); | // Set the total memsize for replaying | |
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| // so that actually four segments will | be replayed |
SpcSetParam (hDrv, SPC_TRIGGERMODE, | TM_TTLPOS); | // Set the triggermode to external TTL mode (rising edge) | ||
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62 | MI.61xx Manual |