Spectrum Brands MI.61XX manual Data organization, Writing data with SpcSetData, Multiplexed data

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Standard generation modes

Programming

 

 

To prevent the program from this deadlock, a second task must be used which can send the SPC_STOP signal to stop the board. Another possibility, that does not require the need of a second task is to define a timeout value.

Register

SPC_TIMEOUT

Value

Direction

Description

295130

r/w

Defines a time in ms after which the function SPC_STARTANDWAIT terminates itself.

 

 

 

This is the easiest and safest way to use the interrupt driven mode. If the board started in the interrupts mode it definitely will not return until either the recording has finished or the timeout time has expired. In that case the function will return with an error code. See the appendix for details.

The following excerpt of a sample program gives you an example of how to start the board in the interrupt driven mode. It is assumed that all board setup has been done before.

SpcSetParam

(hDrv,

SPC_TIMEOUT, 1000);

// Define the timeout to 1000 ms = 1

second

nErr = SpcSetParam

(hDrv, SPC_COMMAND,

SPC_STARTANDWAIT); // Starts the board in the interrupt

driven mode

if (nErr ==

ERR_TIMEOUT)

// Checks for the timeout

 

printf ("No trigger found. Timeout

has expired.\n");

 

An example on how to get a second task that can do some monitoring on the running task and eventually send the SPC_STOP command can be found on the Spectrum driver CD that has been shipped with your board. The latest examples can also be down loaded via our website at http://www.spectrum-instrumentation.com.

Data organization

In standard mode tha data is organized on the board in two memory channels, named memory channel 0 and memory channel 1. The data in memory is organized depending on the used channels and the type of board. This is a result of the internal hardware structure of the board.

Ch0

Ch1

Ch2

Ch3

Sample ordering in standard mode on memory channel 0

 

 

Sample ordering in standard mode on memory channel 1

 

 

X

 

 

 

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

 

 

 

 

 

 

 

 

 

 

X

X

 

 

A0

B0

A1

B1

A2

B2

A3

B3

A4

B4

 

 

 

 

 

 

 

 

 

 

X

 

X

 

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

B0

B1

B2

B3

B4

B5

B6

B7

B8

B9

X

X

X

X

A0

B0

A1

B1

A2

B2

A3

B3

A4

B4

C0

D0

C1

D1

C2

D2

C3

D3

C4

D4

The samples are re-named for better readability. A0 is sample 0 of channel 0, C4 is sample 4 of channel 2, ...

Writing data with SpcSetData

The function SpcSetData enables you to write data to the on-board memory before starting the generation. Depending on your operation system, the function is called with a different amount of parameters. Please refer to the relating chapter earlier in this manual. The examples in this section are written in Visual C++ for Windows, so the examples differ a little bit for the use with linux.

As the data is written individually for every memory channel, it is important to know where the data has to be stored. Please refer to the data organization section, to get the information you need first.

The function SpcSetData has two parameters that allow you to write in any position of the replay memory. That can be very helpful if only parts of the signal should be exchanged. However the user must make sure that the complete replay memory is filled with appropriate data.

The value ’start’ as a 32 bit integer value

This value defines the start of the memory area to be written in samples. This result is, that you do not need to care for the number of bytes a single sample contains. If you want to write the whole memory at once this value must be set to 0.

The value ’len’ as a 32 bit integer value

This value defines the number of samples that are written, beginning with the first sample defined by the ’start’ value mentioned above. If you want to write the whole on-board memory you need to set up that value to the memsize you have set the board up to before acquisition. This memsize must be a total memsize for all channels that are generated from that memory channel. As a result that means if generating two channels from memory channel 0 the „len“ value must be set to „2 * memsize“.

Multiplexed data

Depending on the activated channels and the board type several channels could be stored in one memory channel. As a result that means that „start“ and „len“ parameter have to be multiplied by the number of channels per memory channel (module). If for example two channels have are replayed from one memory channel a call like:

SpcSetData (hDrv, 0, 2 * 4096, 2 * 2048, Data);

writes data of both channels to memory channel 0 starting at sample position 4k and a length of 2k. The Data array must be of course hold data of both channels (in that case 2 * 2k = 4k of data) multiplexed as shown above.

(c) Spectrum GmbH

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Contents English version October 5 MI.61xxPage Software Hardware InstallationSoftware Driver Installation IntroductionStandard generation modes Fifo ModeProgramming the Board Analog OutputsAppendix Option Gated ReplayOption Extra I/O Synchronization OptionPreface IntroductionPreface General InformationIntroduction Different models of the MI.61xx seriesMI.6110 MI.6111 Extra I/O Option -XIO Additional optionsExtra I/O Option -XMF Introduction Additional options StarhubSpectrum type plate Hardware information Block diagram Technical DataFilter Dynamic ParametersOrder information Hardware informationIntroductionSystem Requirements Hardware InstallationInstalling the board in the system Installing a board with extra I/O Option -XMF Installing a board with digital inputs/outputsOnly use the included flat ribbon cables Installing multiple boards synchronized by starhubMounting the wired boards Hooking up the boardsInstalling multiple synchronized boards Interrupt Sharing Software Driver InstallationSoftware Driver Installation Version control InstallationWindows Driver Update Windows Software Driver Installation Windows Windows XP Windows XP Adding boards to the Windows NT driver Windows NTOverview LinuxAutomatic load of the driver Installing the deviceNow it is possible to access the board using this device Driver infoSoftware SoftwareSoftware Overview First Test with SBenchLinux Gnu C ++ Driver InterfaceHeader files Microsoft Visual C++Include Drivers Other Windows C/C++ compilersNational Instruments LabWindows/CVI Driver functionsFunction SpcGetData Function SpcSetParamFunction SpcSetParam Function SpcSetData WindowsSpectrum GmbH Examples Delphi Pascal Programming InterfaceType definition Include DriverDelphi Pascal Programming Interface VBA for Excel Examples Visual Basic Programming InterfaceVisual Basic Examples Visual Basic Programming Interface Register tables Error handlingProgramming the Board OverviewPCI Register Example for error checkingInitialization Starting the automatic initialization routineSerial number Installed memoryHardware version Date of productionDriver version Installed features and optionsUsed interrupt line Used type of driverSpcpciserialno Powerdown and resetExample program for the board initialization SpcpcimemsizeDisabling the outputs Analog OutputsChannel Selection Important note on channels selectionRegister Value Direction Description Amplitude range Setting up the outputsOutput Amplifiers Output offsetOutput Filters Filter SpecificationsMaximum Output Range Programming Standard generation modesGeneral description Minimum and stepsize of memsize and posttrigger in samples Standard generation modes ProgrammingMaximum memsize Maximum posttrigger in MSamplesProgrammingStandard generation modes Starting without interrupt classic modeStarting with interrupt driven mode Command registerValue ’len’ as a 32 bit integer value Data organizationWriting data with SpcSetData Value ’start’ as a 32 bit integer valueSample format Standard modeBit Standard Mode Speed Limitations Fifo ModeGeneral Information Background Fifo Write60040 Read out the number of available Fifo buffers Programming Fifo ModeSoftware Buffers Theoretical maximum sample rate PCI Bus ThroughputDigital I/O 701x or 702x or pattern generator boards Fifo Mode ProgrammingBuffer processing Analog acquisition or generation boardsSpcfifowait Example Fifo generation mode== Maxbuf SpcfifostartProgramming Standard internal sample rate Clock generationInternally generated sample rate External clocking Using plain quartz with no PLLExternal reference clock Maximum external samplerate in MS/s Direct external clockMinimum external sample rate CHANNEL0 CHANNEL1 CHANNEL2 CHANNEL3 External clock with dividerExample External TTL trigger Example for setting up the software triggerTrigger modes and appendant registers Software triggerPositive TTL trigger Example on how to set up the board for positive TTL triggerEdge triggers Trigger modes and appendant registersPositive and negative TTL trigger Trigger modes Standard ModeOption Multiple Replay Output modesTrigger modes Option Multiple Replay Resulting start delaysValue Direction Description General information and trigger delayOption Gated Replay Option Gated ReplaySpctriggermode Tmttlpos Example programAllowed trigger modes External TTL edge triggerTransfer Data Option Extra I/ODigital I/Os Channel directionAnalog Outputs Option Extra I/O Analog OutputsProgramming example Synchronization with option starhub Synchronization OptionDifferent synchronization options Synchronization with option cascadingWrite Data to on-board memory output boards only Setup order for the different synchronization optionsSet up the board parameters Example of board setup for three boardsDefine the remaining boards as trigger slaves Define the boards for trigger masterExample of board #2 set as trigger master 3a Define synchronization or triggerArm the boards for synchronization Define the board for clock masterExample board number 0 is clock master Define the remaining boards as clock slavesExample for data reading Start all of the trigger master boardsWait for the end of the measurement Read data from the on-board memory acquisition boards onlySpcsyncslavefifo Allocate the Fifo software buffers2a Write first data for output boards SpcsyncmasterfifoAs trigger slaves 20xx 30xx 31xx 40xx 45xx 60xx 61xx 70xx 72xx Additions for synchronizing different boardsGeneral information Calculating the clock dividersBoard type 3025 3131 Setting up the clock dividerBoard type 3122 3120 40 MS/sAdditions for equal boards with different sample rates Resulting delays using different boards or speedsDelay in standard non Fifo modes Delay in Fifo modeAppendix Error CodesError name Value hex Value dec Error description AppendixPin assignment of the multipin cable Pin assignment of the multipin connectorExtra I/O with external connectorOption -XMF D15 D13 D11 Pin assignment of the internal multipin connectorExtra I/O with internal connector Option -XIO D14 D12 D10
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