Spectrum Brands MI.61XX manual Maximum Output Range, Output Filters, Filter Specifications

Page 43

Analog Outputs

Setting up the outputs

 

 

Maximum Output Range

In order not to generate distorted signals it is nec- essary to keep the total output range as a combina- tion of the set amplitude and offset within a range of ±3000 mV.

If this limit is exceeded a heavy distorted signal will be seen and the signals waveform will be cut off at the maximum range of +3000 mV or at the mini- mum range of -3000 mV.

To avoid heavily distorted output signals please make sure to keep the signals in a range of ±3000 mV.

To give you an example how the registers of the amplitude and the offset are to be used, the following example shows a setup to match all of the three signals shown in the offset figure.

SpcSetParam (hDrv, SPC_AMP0 ,

1000);

// Set up amplitude of channel0 to ± 1.0

V

SpcSetParam (hDrv, SPC_AMP1 ,

1000);

// Set up amplitude of channel1 to ± 1.0

V

SpcSetParam (hDrv, SPC_AMP2 ,

1500);

// Set up amplitude of channel2 to ± 1.5

V

SpcSetParam (hDrv, SPC_OFFS0,

0);

// Set the output offsets

 

SpcSetParam (hDrv, SPC_OFFS1,

500);

 

 

SpcSetParam (hDrv, SPC_OFFS2,

-500);

 

 

Output Filters

Every output of your Spectrum D/A board is equipped with a bypass path and three fixed filters that can be used for signal smoothing. The filters are located in the signal chain between the output amplifi- cation section and the DAC, as shown in the right figure. Depending on your type of board these filters are of differerent filter types and have different cut off frequencies, as shown below. As well as the set- ting for amplitude and offset, the settings for the filters can be changed at any time. The board will not be stopped for changing the different filters. You can choose between the different filters easily by setting the

dedicated filter registers. The registers and the possible values are shown in the table below.

Register

 

Value

 

Direction

Description

SPC_FILTER0

 

30080

 

r/w

Sets the signal filter of channel0.

SPC_FILTER1

 

30180

 

r/w

Sets the signal filter of channel1.

 

 

 

 

 

 

 

 

 

SPC_FILTER2

 

30280

 

r/w

Sets the signal filter of channel2.

SPC_FILTER3

 

30380

 

r/w

Sets the signal filter of channel3.

 

 

0

 

 

No filter is used on the corresponding channel.

 

 

 

 

 

 

 

 

 

 

1

 

 

Filter 1 is used on the corresponding channel. The type of filter depends on the type of board and is shown below.

 

 

2

 

 

Filter 2 is used on the corresponding channel. The type of filter depends on the type of board and is shown below.

 

 

3

 

 

Filter 3 is used on the corresponding channel. The type of filter depends on the type of board and is shown below.

 

 

 

 

 

 

 

 

 

Filter

Specifications

 

MI.6110

 

MI.6111

 

 

filter 0

 

 

 

No filter will be used.

 

 

filter 1

-3 dB bandwidth

 

 

 

25 MHz

 

 

 

 

 

 

 

 

 

 

filter 2

-3 dB bandwidth

 

 

 

5 MHz

 

 

filter 3

-3 dB bandwidth

 

 

 

500 kHz

 

 

(c) Spectrum GmbH

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Contents English version October 5 MI.61xxPage Software Hardware InstallationSoftware Driver Installation IntroductionStandard generation modes Fifo ModeProgramming the Board Analog OutputsAppendix Option Gated ReplayOption Extra I/O Synchronization OptionPreface IntroductionPreface General InformationMI.6110 MI.6111 Different models of the MI.61xx seriesIntroduction Extra I/O Option -XMF Additional optionsExtra I/O Option -XIO Introduction Additional options StarhubSpectrum type plate Hardware information Block diagram Technical DataFilter Dynamic ParametersOrder information Hardware informationIntroductionInstalling the board in the system Hardware InstallationSystem Requirements Installing a board with extra I/O Option -XMF Installing a board with digital inputs/outputsOnly use the included flat ribbon cables Installing multiple boards synchronized by starhubMounting the wired boards Hooking up the boardsInstalling multiple synchronized boards Software Driver Installation Software Driver InstallationInterrupt Sharing Windows InstallationVersion control Driver Update Windows Software Driver Installation Windows Windows XP Windows XP Adding boards to the Windows NT driver Windows NTOverview LinuxAutomatic load of the driver Installing the deviceNow it is possible to access the board using this device Driver infoSoftware SoftwareSoftware Overview First Test with SBenchLinux Gnu C ++ Driver InterfaceHeader files Microsoft Visual C++Include Drivers Other Windows C/C++ compilersNational Instruments LabWindows/CVI Driver functionsFunction SpcGetData Function SpcSetParamFunction SpcSetParam Function SpcSetData WindowsSpectrum GmbH Examples Delphi Pascal Programming InterfaceType definition Include DriverDelphi Pascal Programming Interface Visual Basic Examples Visual Basic Programming InterfaceVBA for Excel Examples Visual Basic Programming Interface Register tables Error handlingProgramming the Board OverviewPCI Register Example for error checkingInitialization Starting the automatic initialization routineSerial number Installed memoryHardware version Date of productionDriver version Installed features and optionsUsed interrupt line Used type of driverSpcpciserialno Powerdown and resetExample program for the board initialization SpcpcimemsizeDisabling the outputs Analog OutputsChannel Selection Important note on channels selectionRegister Value Direction Description Amplitude range Setting up the outputsOutput Amplifiers Output offsetMaximum Output Range Filter SpecificationsOutput Filters General description Standard generation modesProgramming Minimum and stepsize of memsize and posttrigger in samples Standard generation modes ProgrammingMaximum memsize Maximum posttrigger in MSamplesProgrammingStandard generation modes Starting without interrupt classic modeStarting with interrupt driven mode Command registerValue ’len’ as a 32 bit integer value Data organizationWriting data with SpcSetData Value ’start’ as a 32 bit integer valueBit Standard Mode Standard modeSample format Speed Limitations Fifo ModeGeneral Information Background Fifo Write60040 Read out the number of available Fifo buffers Programming Fifo ModeSoftware Buffers Theoretical maximum sample rate PCI Bus ThroughputDigital I/O 701x or 702x or pattern generator boards Fifo Mode ProgrammingBuffer processing Analog acquisition or generation boardsSpcfifowait Example Fifo generation mode== Maxbuf SpcfifostartProgramming Internally generated sample rate Clock generationStandard internal sample rate External reference clock Using plain quartz with no PLLExternal clocking Minimum external sample rate Direct external clockMaximum external samplerate in MS/s Example External clock with dividerCHANNEL0 CHANNEL1 CHANNEL2 CHANNEL3 External TTL trigger Example for setting up the software triggerTrigger modes and appendant registers Software triggerPositive TTL trigger Example on how to set up the board for positive TTL triggerEdge triggers Trigger modes and appendant registersPositive and negative TTL trigger Trigger modes Standard ModeOption Multiple Replay Output modesTrigger modes Option Multiple Replay Resulting start delaysValue Direction Description General information and trigger delayOption Gated Replay Option Gated ReplaySpctriggermode Tmttlpos Example programAllowed trigger modes External TTL edge triggerTransfer Data Option Extra I/ODigital I/Os Channel directionProgramming example Analog OutputsAnalog Outputs Option Extra I/O Synchronization with option starhub Synchronization OptionDifferent synchronization options Synchronization with option cascadingWrite Data to on-board memory output boards only Setup order for the different synchronization optionsSet up the board parameters Example of board setup for three boardsDefine the remaining boards as trigger slaves Define the boards for trigger masterExample of board #2 set as trigger master 3a Define synchronization or triggerArm the boards for synchronization Define the board for clock masterExample board number 0 is clock master Define the remaining boards as clock slavesExample for data reading Start all of the trigger master boardsWait for the end of the measurement Read data from the on-board memory acquisition boards onlySpcsyncslavefifo Allocate the Fifo software buffers2a Write first data for output boards SpcsyncmasterfifoAs trigger slaves 20xx 30xx 31xx 40xx 45xx 60xx 61xx 70xx 72xx Additions for synchronizing different boardsGeneral information Calculating the clock dividersBoard type 3025 3131 Setting up the clock dividerBoard type 3122 3120 40 MS/sAdditions for equal boards with different sample rates Resulting delays using different boards or speedsDelay in standard non Fifo modes Delay in Fifo modeAppendix Error CodesError name Value hex Value dec Error description AppendixExtra I/O with external connectorOption -XMF Pin assignment of the multipin connectorPin assignment of the multipin cable D15 D13 D11 Pin assignment of the internal multipin connectorExtra I/O with internal connector Option -XIO D14 D12 D10
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