ADTRAN TSU 120e user manual Port Tests

Models: TSU 120e TSU 120

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Chapter 7. Test Menu

The self-test consists of the following tests:

BOARD LEVEL TESTS Each of the TSU 120 boards contain an on-board processor which executes a series of tests checking the circuitry on the board.

• RAM tests; EPROM checksum

• DS0 map tests

On-board data path; sending a known test pattern through an on- board loop

UNIT LEVEL TESTS • Front panel LED verification

• Phase Lock Loop verify

Board-to-board interface test

A test pattern is sent from the controller through a loopback on all other boards and is checked on the controller. This verifies the data path, clocks, and control signals.

If a failure is detected, note the failure number and contact

ADTRAN Technical Support.

Executing the self-test will disrupt normal data flow and prevent remote communication until it is complete.

Port Tests

The Port Tests menu is used to activate testing of specific data ports. It controls the activation of loopbacks and the initiation of data test patterns. Test results are displayed in the LCD win- dow.

Port tests execution will disrupt normal data flow in the port be- ing tested.

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TSU 120 User Manual

61202129L1-1

Page 96
Image 96
ADTRAN TSU 120e user manual Port Tests