Freescale Semiconductor MPC860T REJECT3, MIITXD2, REJECT4, MIITXD1, Miitxen, Miicrs, Miicol

Models: MPC860T

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Freescale Semiconductor, Inc...

 

 

 

 

Freescale Semiconductor, Inc.

 

 

 

 

Table 2-1. FEC Signal Descriptions (Continued)

 

 

 

 

 

 

Name

Pin

Description

 

Number

 

 

 

 

 

 

 

 

 

PD[4]

U16

General-purpose I/O port D bit 4ÑThis is bit 4 of the general-purpose I/O port D.

 

 

 

 

 

 

REJECT3

 

 

 

 

 

Reject 3ÑThis input to SCC3 allows a CAM to reject the current Ethernet frame after it

 

MII_TXD[2]

 

 

 

determines the frame address did not match.

 

 

 

 

 

 

 

 

 

 

 

 

 

MII transmit data 2ÑOutput signal TXD[2] represents bit 2 of the nibble of data when TX_EN

 

 

 

 

is asserted and has no meaning when TX_EN is negated.

 

 

 

 

 

PD[3]

W16

General-purpose I/O port D bit 3ÑThis is bit 3 of the general-purpose I/O port D.

 

REJECT4

 

 

 

 

 

 

Reject 4ÑThis input to SCC4 allows a CAM to reject the current Ethernet frame after it

 

MII_TXD[1]

 

 

 

determines the frame address did not match.

 

 

 

 

 

 

 

 

 

 

 

 

 

MII transmit data 1ÑOutput signal TXD[1] represents bit 1 of the nibble of data when TX_EN

 

 

 

 

is asserted and has no meaning when TX_EN is negated.

 

 

 

 

 

MII_TX_EN

V15

MII transmit enableÑOutput signal TX_EN indicates when there are valid nibbles being

 

 

 

 

presented on the MII. This signal is asserted with the Þrst nibble of preamble and is negated

 

 

 

 

prior to the Þrst TX_CLK following the Þnal nibble of the frame.

 

 

 

 

Note the following:

 

 

 

 

For 860T rev D.1, a 10-kΩpull-down resistor must be used with MII_TX_EN, which is

 

 

 

 

three-stated following reset until ECNTRL[FEC_PINMUX] is set.

 

 

 

 

For 860T rev D.2 and later, MII_TX_EN is a dedicated output and no pull-down resister is

 

 

 

 

required.

 

 

 

 

For 860T rev E.x (planned), MII_TX_EN resets to three-state with a weak internal

 

 

 

 

pull-down to ensure compatibility with 860 applications that may have tied SPARE3 (V15)

 

 

 

 

to VCC or GND. This pin will be 3-V only and must not be pulled up to +5 V.

 

 

 

 

 

MII_CRS

B7

MII carrier receive senseÑWhen input signal CRS is asserted the transmit or receive

 

 

 

 

medium is not idle. In the event of a collision, CRS will remain asserted through the duration

 

 

 

 

of the collision.

 

 

 

 

 

MII_COL

H4

MII collisionÑInput signal COL is asserted upon detection of a collision, and will remain

 

 

 

 

asserted while the collision persists. The behavior of this signal is not speciÞed for full-duplex

 

 

 

 

mode.

 

 

 

 

 

MII_MDIO

H18

MII management dataÑBidirectional signal, MDIO transfers control information between the

 

 

 

 

PHY and MAC. Transitions synchronously to MDC.

 

 

 

 

 

MOTOROLAChapter 2. FEC External Signals2-3

PRELIMINARYÑSUBJECTFor ore nformationTO CHANGEOn ThisWITHOUTProduct,NOTICE

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Freescale Semiconductor MPC860T user manual REJECT3, MIITXD2, REJECT4, MIITXD1, Miitxen, Miicrs, Miicol, Miimdio