Freescale Semiconductor MPC860T user manual Illustrations, Title Number

Freescale Semiconductor, Inc...

Freescale Semiconductor, Inc.

ILLUSTRATIONS

Figure	Title	Page
Number		Number
1-1	MPC860T Block Diagram	1-4
1-2	MPC860T Interrupt Structure	1-5
1-3	MPC860T Serial Configuration	1-6
3-1	Ethernet Address Recognition Flowchart	3-5
5-1	SDMA Bus Arbitration	5-1
5-2	SDMA Configuration Register (SDCR)	5-2
6-1	ADDR_LOW Register	6-2
6-2	ADDR_HIGH Register	6-3
6-3	HASH_TABLE_HIGH Register	6-4
6-4	HASH_TABLE_LOW Register	6-4
6-5	R_DES_START Register	6-5
6-6	X_DES_START Register	6-6
6-7	R_BUFF_SIZE Register	6-7
6-8	ECNTRL Register	6-7
6-9	I_EVENT/I_MASK Registers	6-8
6-10	IVEC Register	6-10
6-11	R_DES_ACTIVE Register	6-11
6-12	X_DES_ACTIVE Register	6-12
6-13	MII_DATA Register	6-13
6-14	MII_SPEED Register	6-14
6-15	R_BOUND Register	6-15
6-16	R_FSTART Register	6-16
6-17	X_WMRK Register	6-17
6-18	X_FSTART Register	6-18
6-19	FUN_CODE Register	6-18
6-20	R_CNTRL Register	6-19
6-21	R_HASH Register	6-20
6-22	X_CNTRL Register	6-21
6-23	Receive Buffer Descriptor (RxBD)	6-25
6-24	Transmit Buffer Descriptor (TxBD)	6-26
7-1	MII Receive Signal Timing Diagram	7-2
7-2	MII Transmit Signal Timing Diagram	7-3
7-3	MII Async Inputs Timing Diagram	7-3
7-4	MII Serial Management Channel Timing Diagram	7-4
7-5	MPC860T Pinout DiagramÑTop View	7-5

MOTOROLA	Illustrations	vii
	PRELIMINARYÑSUBJECTFor ore nformation On This Product,
	TO CHANGE WITHOUT NOTICE
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