Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

Bits

0

1

2

3

4

5

6

7

8

9

10

11

 

12

13

14

15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Field

 

 

 

Ñ

 

 

 

R_DES_ACTIVE

 

 

 

 

Ñ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset

 

 

 

 

 

 

 

0000_0000_0000_0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

 

 

 

 

 

 

Read/write

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Addr

 

 

 

 

 

 

 

0xE50

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bits

16

17

18

19

20

21

22

23

24

25

26

27

 

28

29

30

31

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Field

0

0

0

0

0

0

0

0

0

0

0

0

 

0

0

0

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset

 

 

 

 

 

 

 

0000_0000_0000_0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

 

 

 

 

 

 

Read/write

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Addr

 

 

 

 

 

 

 

0xE52

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 6-11. R_DES_ACTIVE Register

Table 6-12 describes R_DES_ACTIVE Þelds.

Table 6-12. R_DES_ACTIVE Field Descriptions

Bits

Name

Description

 

 

 

0Ð6

Ñ

Reserved.

 

 

 

7

R_DES_ACTIVE

Signals the FEC that empty buffers are available. Set when this register is written,

 

 

regardless of the value written. Cleared by the FEC whenever no additional BDs are

 

 

ready in the RxBD ring.

 

 

 

8Ð31

Ñ

Reserved.

 

 

 

6.2.12 TxBD Active Register (X_DES_ACTIVE)

The TxBD active register, shown in Figure 6-12, is a command register that the user should write to indicate that the TxBD ring was updated (transmit buffers have been produced by the software driver with TxBD[R] set).

Whenever the register is written, X_DES_ACTIVE is set, regardless of the data written by the user. When the bit is set, the TxBD ring is polled and transmit frames (provided ECNTRL[ETHER_EN] is also set) are processed. Once a TxBD whose ownership bit is not set is polled, X_DES_ACTIVE is cleared and polling stops until the bit is set, signifying additional BDs have been placed into the TxBD ring.

X_DES_ACTIVE is cleared at reset and by clearing ECNTRL[ETHER_EN].

MOTOROLAChapter 6.Programming Model6-11

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Freescale Semiconductor MPC860T TxBD Active Register Xdesactive, describes Rdesactive Þelds, Rdesactive Field Descriptions