Freescale Semiconductor MPC860T Buffer Descriptors BDs, Ethernet Receive Buffer Descriptor RxBD

Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

(though these steps could also be done before setting ETHER_EN).

Table 6-27. User Initialization (after Setting ECNTRL[ETHER_EN])

Step Description

1Fill RxBD ring with empty buffers

2 Set R_DES_ACTIVE

6.4Buffer Descriptors (BDs)

Data for Fast Ethernet frames must reside in memory external to the MPC860T device. Frame data is placed in one or more buffers, each of which is pointed to by a BD, which also contains the current state of the buffer. For maximum user ßexibility, BDs are also located in external memory.

A buffer is produced by setting TxBD[R] or RxBD[E]. Writing to either X_DES_ACTIVE or R_DES_ACTIVE indicates that a buffer is in external memory for the transmit or receive data trafÞc, respectively. The hardware reads the BDs and processes the buffers. After the data DMA completes and the BD status bits are written by the DMA engine, hardware clears TxBD[R] or RxBD[E] to signal that the buffer was processed. Software can poll the BDs or may rely on the buffer/frame interrupts to detect when buffers have been processed.

ECNTRL[ETHER_EN] operates as a reset to the BD/DMA logic. When ETHER_EN is cleared, the DMA engine BD pointers are reset to point to the starting TxBDs and RxBDs. The BDs are not initialized by hardware during reset. At least one TxBD and one RxBD must be initialized by software (write 0x0000_0000 to the most signiÞcant word of the BD) before ETHER_EN is set.

The BDs operate as a ring. R_DES_START deÞnes the starting address for the RxBD ring and X_DES_START deÞnes the starting address for TxBD ring. The last BD in each ring is indicated by the wrap (W) bit. When set, W indicates that the next BD in the ring is at the location pointed to by R_DES_START and X_DES_START for the receive and transmit rings, respectively. BD rings must start on a double-word boundary.

6.4.1 Ethernet Receive Buffer Descriptor (RxBD)

The RxBD is shown in Figure 6-23. The Þrst word of the RxBD contains control and status bits. The user initializes RxBD[E,W] and the Rx buffer pointer. When the buffer has been accessed by a DMA, the FEC modiÞes RxBD[E,L,M,BC,MC,LG,NO,SH,CR,OV,TR] and writes the length of the used portion of the buffer in the Þrst word. The FEC modiÞes RxBD[M,BC,MC,LG,NO,SH,CR,TR,OV] only if L = 1.

6-24MPC860T (Rev. D) Fast Ethernet Controller Supplement MOTOROLA

PRELIMINARYÑSUBJECTFor ore nformationTO CHANGEOn ThisWITHOUTProduct,NOTICE

Go to: www.freescale.com