Hitachi NJI-350B manual Application instructions-8, Logical shift right, LSR d, n

LSR (d, n)

Chapter 5 Instruction Specifications

Item number

Application instructions-8

Name

Logical shift right

Ladder format

Condition code

Processing time (∝s)

Remark

R7F4

R7F3

R7F2

R7F1

R7F0

Average

Maximum

LSR (d, n)

DER

ERR

SD

V

C

Upper case: W

36



Lower case: DW

z

z

z

z

↕

Instruction format

Number of steps

Condition

Steps

LSR (d, n)

3

45



Bit

Word

Double word

Constant

Usable I/O

Other

X

Y

M

CU, CT

WX

WY

WM

TC

DX

DY

DM

R,

TD, SS,

WR,

DR,

d

I/O to be shifted

{

{

{

{

{

n

Number of bits to be

{

{

{

{

{

The constant is set in

shifted

decimal.

Function

•Shifts the contents of d to the right (toward the lower digits) by n bits.

•“0” is set from the most significant bit to the nth bit.

•The content of the nth bit from the least significant bit is set in C (R7F0).

Before execution							d
									n bits
								B
After execution										C (R7F0)
0		0	0	n bits	0	0				B (R7F0)
	Most significant bit (MSB)								Least significant bit (LSB)
If d is a word:			Designates the shift amount, depending on the contents (0 to 15) of the lower 4 bits (b3 to b0) of n
			(WX, WY, WR, WM, TC). (Upper bits are ignored and considered as “0.”)
			The n (constant) can be set to 0 to 15 (decimal).
If d is a double word:			Designates the shift amount, depending on the contents (0 to 31) of the lower 5 bits (b4 to b0) of n
			(WX, WY, WR, WM, TC). (Upper bits are ignored and considered as “0.”)
			The n (constant) can be set to 0 to 31 (decimal).

Notes

•If n is equal to “0,” the shifting is not performed. The previous state is retained in C.

Program example

X00001 DIF1			LD	X00001
	LSR	(WR0000 ,1 )	AND	DIF1
			[
			LSR	(WR0000 ,1)
			]

Program description

•When X00001 rises, the content of WR0000 is shifted to the right by one bit.

At this time, “0” is set in b15 and the value of b0 immediately prior to the shift is set in R7F0.

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