Intel 830 2.6.3.1 GTL+ Front Side Bus Specifications

Datasheet 31

Electrical Specifications

2.6.3.1 GTL+ Front Side Bus Specifications

In most cases, termination resistors are not required as these are integrated into the processor

silicon. See Table 2 -8 for details on which GTL+ signals do not include on-die termination.

Valid high and low levels are determined by the input buffers by comparing with a reference

voltage called GTLREF. Table2-16 lists the GTLREF specifications. The GTL+ reference voltage

(GTLREF) must be generated on the motherboard using high precision voltage divider circuits.

Table 2-14. VTTPWRGD DC Specifications

Symbol Parameter Min Typ Max Unit Notes

VIL Input Low Voltage — — 0.3 V

VIH Input High Voltage 0.9 — — V

Table 2-15. BOOTSELECT and MSID[1:0] DC Specifications

Symbol Parameter Min Typ Max Unit Notes

VIL Input Low Voltage — — 0.24 V 1

NOTES:

1. These parameters are not tested and are based on design simulations.

VIH Input High Voltage 0.96 — — V -

Table 2-16. GTL+ Bus Voltage Definitions

Symbol Parameter Min Typ Max Units Notes1

NOTES:

1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.

GTLREF_PU GTLREF pull up resistor 124 * 0.99 124 124 * 1.01 Ω2

2. GTLREF is to be generated from VTT by a voltage divider of 1% resistors (one divider for each GTLREF land).

GTLREF_PD GTLREF pull down resistor 210 * 0.99 210 210 * 1.01 Ω2

RPULLUP On die pullup for

BOOTSELECT signal 500 - 5000 Ω3

3. These pull-ups are to VTT.

RTT

60Ω Platform Termination

Resistance 41 50 58 Ω4

4. RTT is the on-die termination resistance measured at VTT/2 of the GTL+ output driver. The IMPSEL pin is used to select a

50Ω or 60Ω buffer and RTT value.

50Ω Platform Termination

Resistance 37 45 52 Ω4

COMP[1:0]

60Ω Platform COMP

Resistance 59.8 60.4 61 Ω5

5. COMP resistance must be provided on the system board with 1% resistors. COMP[1:0] resistors are to VSS. COMP[3:2]

resistors are to VSS.

50Ω Platform COMP

Resistance 49.9 * 0.99 49.9 49.9 * 1.01 Ω5

COMP[3:2]

60Ω Platform COMP

Resistance 59.8 60.4 61 Ω5

50Ω Platform COMP

Resistance 49.9 * 0.99 49.9 49.9 * 1.01 Ω5

Contents

Main Contents Contents Page Figures Tables Revision History Page Intel Pentium D Processor 800 Sequence Features Page 1 1.1 Terminology 1.1.1 Processor Packaging Terminology Introduction 1.2 References Table 1-1. References Page 2 2.1 Power and Ground Lands 2.2 Decoupling Guidelines 2.2.1 VCC Decoupling 2.2.2 VTT Decoupling 2.3 Voltage Identification Table 2-1. Voltage Identification Definition 2.4 Reserved, Unused, FC and TESTHI Signals 2.5 Voltage and Current Specifications 2.5.1 Absolute Maximum and Minimum Ratings 2.5.2 DC Voltage and Current Specifications Table 2-3. Voltage and Current Specifications Table 2-4. VCC Static and Transient Tolerance for 775_VR_CONFIG_05A Pentium D Processor Figure 2-1. VCC Static and Transient Tolerance for 775_VR_CONFIG_05A Pentium D Processor Table 2-5. VCC Static and Transient Tolerance for 775_VR_CONFIG_05B Pentium D Processor Figure 2-2. VCC Static and Transient Tolerance for 775_VR_CONFIG_05B Pentium D Processor 2.5.3 VCC Overshoot Specification Time Example Overshoot Waveform T VID 2.6 Signaling Specifications 2.6.1 FSB Signal Groups Table 2-7. FSB Signal Groups 2.6.2 GTL+ Asynchronous Signals Table 2-8. Signal Characteristics Table 2-9. Signal Reference Voltages 2.6.3 FSB DC Specifications Table 2-11. GTL+ Signal Group DC Specifications Table 2-12. PWRGOOD Input and TAP Signal Group DC Specifications Table 2-13. GTL+ Asynchronous Signal Group DC Specifications 2.6.3.1 GTL+ Front Side Bus Specifications Table 2-14. VTTPWRGD DC Specifications Table 2-15. BOOTSELECT and MSID[1:0] DC Specifications Table 2-16. GTL+ Bus Voltage Definitions 2.7 Clock Specifications 2.7.1 FSB Clock (BCLK[1:0]) and Processor Clocking 2.7.2 FSB Frequency Select Signals 2.7.3 Phase Lock Loop (PLL) and Filter Figure 2-4. Phase Lock Loop (PLL) Filter Requirements 3 Specifications 3.1 Package Mechanical Drawing Page Page Page 3.2 Processor Component Keep-Out Zones 3.3 Package Loading Specifications 3.4 Package Handling Guidelines 3.5 Package Insertion Specifications 3.6 Processor Mass Specification 3.7 Processor Materials 3.8 Processor Markings Page Package Mechanical Specifications 3.9 Processor Land Coordinates Figure 3-7. Processor Land Coordinates, Top View Socket LGA775 Quadrants Top View V CC / V VTT / Clocks Data 4 Figure 4-1. Landout Diagram (Top View Left Side) Figure 4-2. Landout Diagram (Top View Right Side) Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page 4.2 Alphabetical Signals Reference Table 4-3. Signal Description (Sheet 1 of 8) Table 4-3. Signal Description (Sheet 2 of 8) Table 4-3. Signal Description (Sheet 3 of 8) Table 4-3. Signal Description (Sheet 4 of 8) Table 4-3. Signal Description (Sheet 5 of 8) Table 4-3. Signal Description (Sheet 6 of 8) Table 4-3. Signal Description (Sheet 7 of 8) Table 4-3. Signal Description (Sheet 8 of 8) Page 5 Design Considerations 5.1 Processor Thermal Specifications 5.1.1 Thermal Specifications Page Figure 5-1. Thermal Profile for the Pentium D Processor with PRB=1 Figure 5-2. Thermal Profile for the Pentium D Processor with PRB=0 5.1.2 Thermal Metrology 5.2 Processor Thermal Features 5.2.1 Thermal Monitor 5.2.2 On-Demand Mode 5.2.3 PROCHOT# Signal 5.2.4 FORCEPR# Signal Pin 5.2.5 THERMTRIP# Signal 5.2.6 TCONTROL and Fan Speed Reduction 5.2.7 Thermal Diode Page Page 6 6.1 Power-On Configuration Options 6.2 Clock Control and Low Power States 6.2.1 Normal State 6.2.2 HALT and Enhanced HALT Powerdown States 6.2.2.1 HALT Powerdown State 6.2.2.2 Enhanced HALT Powerdown State 6.2.3 Stop-Grant State 6.2.4 Enhanced HALT Snoop or HALT Snoop State, Grant Snoop State 6.2.4.1 HALT Snoop State, Grant Snoop State 6.2.4.2 Enhanced HALT Snoop State 6.2.5 Enhanced Intel SpeedStep Techn olo gy 7 7.1 Mechanical Specifications 7.1.1 Boxed Processor Cooling Solution Dimensions 7.1.2 Boxed Processor Fan Heatsink Weight 7.1.3 Boxed Processor Retention Mechanism and Heatsink Attach Clip Assembly 7.2 Electrical Requirements 7.2.1 Fan Heatsink Power Supply Page 7.3 Thermal Specifications 7.3.1 Boxed Processor Cooling Requirements Page 7.3.2 Variable Speed Fan Page 8 (BTX) Type I Boxed Processor Specifications 8.1 Mechanical Specifications 8.1.1 Cooling Solution Dimensions 8.1.2 Boxed Processor Fan Heatsink Weight 8.1.3 Boxed Processor Support and Retention Module (SRM) 8.2 Electrical Requirements 8.2.1 Fan Heatsink Power Supply Page 8.3 Thermal Specifications 8.3.1 Boxed Processor Cooling Requirements 8.3.2 Variable Speed Fan Page Page 9 9.1 Logic Analyzer Interface (LAI) 9.1.1 Mechanical Considerations 9.1.2 Electrical Considerations