Datasheet 69
Land Listing and Signal Descriptions
DRDY# Input/
Output
DRDY# (Data Ready) is asserted by the data driver on each data transfer,
indicating valid data on the data bus. In a multi-common clock data transfer,
DRDY# may be de-asserted to insert idle clocks. This signal must connect the
appropriate pins/lands of all processor FSB agents.
DSTBN[3:0]# Input/
Output
DSTBN[3:0]# are the data strobes used to latch in D[63:0]#.
DSTBP[3:0]# Input/
Output
DSTBP[3:0]# are the data strobes used to latch in D[63:0]#.
FCx Other FC signals are signals that are available for compatibility with other processors.
FERR#/PBE# Output
FERR#/PBE# (floating point error/pending break event) is a multiplexed signal
and its meaning is qualified by STPCLK#. When STPCLK# is not asserted,
FERR#/PBE# indicates a floating-point error and will be asserted when the
processor detects an unmasked floating-point error. When STPCLK# is not
asserted, FERR#/PBE# is similar to the ERROR# signal on the Intel 387
coprocessor, and is included for compatibility with systems using MS-DOS*-
type floating-point error reporting. When STPCLK# is asserted, an assertion of
FERR#/PBE# indicates that the processor has a pending break event waiting
for service. The assertion of FERR#/PBE# indicates that the processor should
be returned to the Normal state. For additional information on the pending break
event functionality, including the identification of support of the feature and
enable/disable information, refer to volume 3 of the Intel Architecture Software
Developer's Manual and the Intel Processor Identification and the CPUID
Instruction application note.
FORCEPR# Input The FORCEPR# input can be used by the platform to force the processor (both
cores) to activate the Thermal Control Circuit (TCC). The TCC will remain active
until the system de-asserts FORCEPR#.
GTLREF[1:0] Input GTLREF[1:0] determine the signal reference level for GTL+ input signals.
GTLREF[1:0] are used by the GTL+ receivers to determine if a signal is a logical
0 or logical 1.
GTLREF_SEL Output GTLREF_SEL is used to select the appropriate chipset GTLREF voltage.
HIT#
HITM#
Input/
Output
Input/
Output
HIT# (Snoop Hit) and HITM# (Hit Modified) convey transaction snoop operation
results. Any FSB agent may assert both HIT# and HITM# together to indicate
that it requires a snoop stall, which can be continued by reasserting HIT# and
HITM# together.
Table 4-3. Signal Description (Sheet 4 of 8)Name Type Description
Signals AssociatedStrobe
D[15:0]#, DBI0# DSTBN0#
D[31:16]#, DBI1# DSTBN1#
D[47:32]#, DBI2# DSTBN2#
D[63:48]#, DBI3# DSTBN3#
Signals AssociatedStrobe
D[15:0]#, DBI0# DSTBP0#
D[31:16]#, DBI1# DSTBP1#
D[47:32]#, DBI2# DSTBP2#
D[63:48]#, DBI3# DSTBP3#